ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/riscv: Relax fld alignment requirement 

According to the risc-v specification:
"FLD and FSD are only guaranteed to execute atomically if the effective
address is naturally aligned and XLEN≥64."

We currently implement fld as MO_ATOM_IFALIGN when XLEN < 64, which does
not violate the rules. But it will hide some problems. So relax it to
MO_ATOM_NONE.

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240802072417.659-4-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
LIU Zhiwei 2024-08-02 15:24:17 +08:00 committed by Alistair Francis
parent 30d24145da
commit 5e54b439f5
1 changed files with 14 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
target/riscv/insn_trans/trans_rvd.c.inc
View File

@ -48,11 +48,17 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a)
REQUIRE_EXT(ctx, RVD);
/*
* Zama16b applies to loads and stores of no more than MXLEN bits defined
* in the F, D, and Q extensions.
* FLD and FSD are only guaranteed to execute atomically if the effective
* address is naturally aligned and XLEN≥64. Also, zama16b applies to
* loads and stores of no more than MXLEN bits defined in the F, D, and
* Q extensions.
*/
if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) {
if (get_xl_max(ctx) == MXL_RV32) {
memop |= MO_ATOM_NONE;
} else if (ctx->cfg_ptr->ext_zama16b) {
memop |= MO_ATOM_WITHIN16;
} else {
memop |= MO_ATOM_IFALIGN;
}
decode_save_opc(ctx);
@ -71,8 +77,12 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
REQUIRE_FPU;
REQUIRE_EXT(ctx, RVD);
if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) {
if (get_xl_max(ctx) == MXL_RV32) {
memop |= MO_ATOM_NONE;
} else if (ctx->cfg_ptr->ext_zama16b) {
memop |= MO_ATOM_WITHIN16;
} else {
memop |= MO_ATOM_IFALIGN;
}
decode_save_opc(ctx);