mirror of https://github.com/xemu-project/xemu.git
X86 queue, 2016-06-14 (v2)
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJXYHcgAAoJECgHk2+YTcWmRoMP/2YZd1wDM1vRxIMjOSH5X26K qJpj8jPpKQKJjQ7pftWlhE8Itufs9UT+C9tebNXH2rpaduPqoNQUQ4GeRonM2Ypi Hzcx8xbX8weX9WAOH35FHj4Xd/R1ZoShGorQjkZfgTsqidU0hW5I5s7cULhCzbT+ r1tA6F+59ujt+nS1ifsETzLK3c2oiAjLC9Ocv36rZfx3SfD74kpFGRzW3rfGMe8P VExhFnZIySfb2aesHR7nmhXmlX1Biy9TLErUjE5EjtCdgv0VDovVAsCBWKHYsPJK s2JTwF7oHbc7wxrVr6P3D/EVww1vsGx4K3vBLbWwagSvgM0E6gg/Z7eub0dDMk0H cR/vfDkxyJUjwbi+qbJM68/mNBIE2e5s7M8aQPt85xqOj7ekiRgQyBgBqLUvSGs7 7CHTg6enkN5QNfZflR+QtTlYWW4Kx/DPwOCCBvmOKYoxN6htFCNnJoyrrXMviqhL ZNyo1kbPw2no9mONGDsCpEhvTLHl8MRIQlnVL8ksFSXsHhXnF8785axQWpQAiPoO +YFV24tSW+IQDbODNl0T04gwGdlDsDIoqxhzsi8zjY9hzdAdy9HIKv0zjsKzLW0h xPCZKhI5uIU7pylRnJhvyt+kCypyT0aQES8PR3u9pGhlUbJQ0J6M87aWhEDAsqZH NPd7R+sAqCub558T1Vr8 =JI9l -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging X86 queue, 2016-06-14 (v2) # gpg: Signature made Tue 14 Jun 2016 22:29:04 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: target-i386: Consolidate calls of object_property_parse() in x86_cpu_parse_featurestr target-i386: Use cpu_generic_init() in cpu_x86_init() target-i386: Move xcc->kvm_required check to realize time target-i386: Remove assert(kvm_enabled()) from host_x86_cpu_initfn() target-i386: Move features logic that requires CPUState to realize time target-i386: Remove xlevel & hv-spinlocks option fixups target-i386: Implement CPUID[0xB] (Extended Topology Enumeration) pc: Add 2.7 machine target-i386: add Skylake-Client cpu model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
5deaac15bf
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@ -432,13 +432,25 @@ static void pc_i440fx_machine_options(MachineClass *m)
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m->default_display = "std";
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}
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static void pc_i440fx_2_6_machine_options(MachineClass *m)
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static void pc_i440fx_2_7_machine_options(MachineClass *m)
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{
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pc_i440fx_machine_options(m);
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m->alias = "pc";
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m->is_default = 1;
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}
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DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
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pc_i440fx_2_7_machine_options);
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static void pc_i440fx_2_6_machine_options(MachineClass *m)
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{
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pc_i440fx_2_7_machine_options(m);
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m->is_default = 0;
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m->alias = NULL;
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SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
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}
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DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
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pc_i440fx_2_6_machine_options);
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@ -447,8 +459,6 @@ static void pc_i440fx_2_5_machine_options(MachineClass *m)
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{
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PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
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pc_i440fx_2_6_machine_options(m);
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m->alias = NULL;
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m->is_default = 0;
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pcmc->save_tsc_khz = false;
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m->legacy_fw_cfg_order = 1;
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SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
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@ -283,12 +283,22 @@ static void pc_q35_machine_options(MachineClass *m)
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m->no_floppy = 1;
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}
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static void pc_q35_2_6_machine_options(MachineClass *m)
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static void pc_q35_2_7_machine_options(MachineClass *m)
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{
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pc_q35_machine_options(m);
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m->alias = "q35";
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}
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DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
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pc_q35_2_7_machine_options);
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static void pc_q35_2_6_machine_options(MachineClass *m)
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{
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pc_q35_2_7_machine_options(m);
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m->alias = NULL;
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SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
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}
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DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
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pc_q35_2_6_machine_options);
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@ -296,7 +306,6 @@ static void pc_q35_2_5_machine_options(MachineClass *m)
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{
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PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
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pc_q35_2_6_machine_options(m);
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m->alias = NULL;
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pcmc->save_tsc_khz = false;
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m->legacy_fw_cfg_order = 1;
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SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
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@ -356,7 +356,16 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
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int e820_get_num_entries(void);
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bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
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#define PC_COMPAT_2_6 \
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HW_COMPAT_2_6 \
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{\
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.driver = TYPE_X86_CPU,\
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.property = "cpuid-0xb",\
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.value = "off",\
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},
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#define PC_COMPAT_2_5 \
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PC_COMPAT_2_6 \
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HW_COMPAT_2_5
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/* Helper for setting model-id for CPU models that changed model-id
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@ -41,6 +41,7 @@
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#include "sysemu/sysemu.h"
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#include "hw/qdev-properties.h"
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#include "hw/i386/topology.h"
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#ifndef CONFIG_USER_ONLY
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#include "exec/address-spaces.h"
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#include "hw/hw.h"
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@ -677,6 +678,14 @@ static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
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return oc;
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}
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static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
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{
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const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
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assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX));
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return g_strndup(class_name,
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strlen(class_name) - strlen(X86_CPU_TYPE_SUFFIX));
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}
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struct X86CPUDefinition {
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const char *name;
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uint32_t level;
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@ -1238,6 +1247,51 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x80000008,
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.model_id = "Intel Core Processor (Broadwell)",
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},
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{
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.name = "Skylake-Client",
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.level = 0xd,
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.vendor = CPUID_VENDOR_INTEL,
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.family = 6,
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.model = 94,
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.stepping = 3,
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.features[FEAT_1_EDX] =
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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CPUID_DE | CPUID_FP87,
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.features[FEAT_1_ECX] =
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CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
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CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
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CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
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CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
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CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
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CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
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.features[FEAT_8000_0001_EDX] =
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CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
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CPUID_EXT2_SYSCALL,
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.features[FEAT_8000_0001_ECX] =
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CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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.features[FEAT_7_0_EBX] =
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
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CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
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CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX,
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/* Missing: XSAVES (not supported by some Linux versions,
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* including v4.1 to v4.6).
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* KVM doesn't yet expose any XSAVES state save component,
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* and the only one defined in Skylake (processor tracing)
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* probably will block migration anyway.
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*/
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.features[FEAT_XSAVE] =
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CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
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CPUID_XSAVE_XGETBV1,
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.features[FEAT_6_EAX] =
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CPUID_6_EAX_ARAT,
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.xlevel = 0x80000008,
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.model_id = "Intel Core Processor (Skylake)",
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},
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{
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.name = "Opteron_G1",
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.level = 5,
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@ -1501,16 +1555,17 @@ static void host_x86_cpu_initfn(Object *obj)
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CPUX86State *env = &cpu->env;
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KVMState *s = kvm_state;
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assert(kvm_enabled());
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/* We can't fill the features array here because we don't know yet if
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* "migratable" is true or false.
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*/
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cpu->host_features = true;
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env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
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env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
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env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
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/* If KVM is disabled, x86_cpu_realizefn() will report an error later */
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if (kvm_enabled()) {
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env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
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env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
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env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
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}
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object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort);
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}
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@ -1894,6 +1949,14 @@ static inline void feat2prop(char *s)
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}
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}
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/* Compatibily hack to maintain legacy +-feat semantic,
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* where +-feat overwrites any feature set by
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* feat=on|feat even if the later is parsed after +-feat
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* (i.e. "-x2apic,x2apic=on" will result in x2apic disabled)
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*/
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static FeatureWordArray plus_features = { 0 };
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static FeatureWordArray minus_features = { 0 };
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/* Parse "+feature,-feature,feature=foo" CPU feature string
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*/
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static void x86_cpu_parse_featurestr(CPUState *cs, char *features,
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@ -1901,97 +1964,61 @@ static void x86_cpu_parse_featurestr(CPUState *cs, char *features,
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{
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X86CPU *cpu = X86_CPU(cs);
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char *featurestr; /* Single 'key=value" string being parsed */
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FeatureWord w;
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/* Features to be added */
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FeatureWordArray plus_features = { 0 };
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/* Features to be removed */
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FeatureWordArray minus_features = { 0 };
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uint32_t numvalue;
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CPUX86State *env = &cpu->env;
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Error *local_err = NULL;
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featurestr = features ? strtok(features, ",") : NULL;
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if (!features) {
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return;
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}
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while (featurestr) {
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char *val;
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for (featurestr = strtok(features, ",");
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featurestr && !local_err;
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featurestr = strtok(NULL, ",")) {
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const char *name;
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const char *val = NULL;
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char *eq = NULL;
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/* Compatibility syntax: */
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if (featurestr[0] == '+') {
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add_flagname_to_bitmaps(featurestr + 1, plus_features, &local_err);
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continue;
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} else if (featurestr[0] == '-') {
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add_flagname_to_bitmaps(featurestr + 1, minus_features, &local_err);
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} else if ((val = strchr(featurestr, '='))) {
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*val = 0; val++;
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feat2prop(featurestr);
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if (!strcmp(featurestr, "xlevel")) {
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char *err;
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char num[32];
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continue;
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}
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|
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numvalue = strtoul(val, &err, 0);
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if (!*val || *err) {
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error_setg(errp, "bad numerical value %s", val);
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return;
|
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}
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if (numvalue < 0x80000000) {
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error_report("xlevel value shall always be >= 0x80000000"
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", fixup will be removed in future versions");
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numvalue += 0x80000000;
|
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}
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snprintf(num, sizeof(num), "%" PRIu32, numvalue);
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object_property_parse(OBJECT(cpu), num, featurestr, &local_err);
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} else if (!strcmp(featurestr, "tsc-freq")) {
|
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int64_t tsc_freq;
|
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char *err;
|
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char num[32];
|
||||
|
||||
tsc_freq = qemu_strtosz_suffix_unit(val, &err,
|
||||
QEMU_STRTOSZ_DEFSUFFIX_B, 1000);
|
||||
if (tsc_freq < 0 || *err) {
|
||||
error_setg(errp, "bad numerical value %s", val);
|
||||
return;
|
||||
}
|
||||
snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
|
||||
object_property_parse(OBJECT(cpu), num, "tsc-frequency",
|
||||
&local_err);
|
||||
} else if (!strcmp(featurestr, "hv-spinlocks")) {
|
||||
char *err;
|
||||
const int min = 0xFFF;
|
||||
char num[32];
|
||||
numvalue = strtoul(val, &err, 0);
|
||||
if (!*val || *err) {
|
||||
error_setg(errp, "bad numerical value %s", val);
|
||||
return;
|
||||
}
|
||||
if (numvalue < min) {
|
||||
error_report("hv-spinlocks value shall always be >= 0x%x"
|
||||
", fixup will be removed in future versions",
|
||||
min);
|
||||
numvalue = min;
|
||||
}
|
||||
snprintf(num, sizeof(num), "%" PRId32, numvalue);
|
||||
object_property_parse(OBJECT(cpu), num, featurestr, &local_err);
|
||||
} else {
|
||||
object_property_parse(OBJECT(cpu), val, featurestr, &local_err);
|
||||
}
|
||||
eq = strchr(featurestr, '=');
|
||||
if (eq) {
|
||||
*eq++ = 0;
|
||||
val = eq;
|
||||
} else {
|
||||
feat2prop(featurestr);
|
||||
object_property_parse(OBJECT(cpu), "on", featurestr, &local_err);
|
||||
val = "on";
|
||||
}
|
||||
if (local_err) {
|
||||
error_propagate(errp, local_err);
|
||||
return;
|
||||
|
||||
feat2prop(featurestr);
|
||||
name = featurestr;
|
||||
|
||||
/* Special case: */
|
||||
if (!strcmp(name, "tsc-freq")) {
|
||||
int64_t tsc_freq;
|
||||
char *err;
|
||||
char num[32];
|
||||
|
||||
tsc_freq = qemu_strtosz_suffix_unit(val, &err,
|
||||
QEMU_STRTOSZ_DEFSUFFIX_B, 1000);
|
||||
if (tsc_freq < 0 || *err) {
|
||||
error_setg(errp, "bad numerical value %s", val);
|
||||
return;
|
||||
}
|
||||
snprintf(num, sizeof(num), "%" PRId64, tsc_freq);
|
||||
val = num;
|
||||
name = "tsc-frequency";
|
||||
}
|
||||
featurestr = strtok(NULL, ",");
|
||||
|
||||
object_property_parse(OBJECT(cpu), val, name, &local_err);
|
||||
}
|
||||
|
||||
if (cpu->host_features) {
|
||||
for (w = 0; w < FEATURE_WORDS; w++) {
|
||||
env->features[w] =
|
||||
x86_cpu_get_supported_feature_word(w, cpu->migratable);
|
||||
}
|
||||
}
|
||||
|
||||
for (w = 0; w < FEATURE_WORDS; w++) {
|
||||
env->features[w] |= plus_features[w];
|
||||
env->features[w] &= ~minus_features[w];
|
||||
if (local_err) {
|
||||
error_propagate(errp, local_err);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2175,7 +2202,6 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)
|
|||
X86CPU *cpu_x86_create(const char *cpu_model, Error **errp)
|
||||
{
|
||||
X86CPU *cpu = NULL;
|
||||
X86CPUClass *xcc;
|
||||
ObjectClass *oc;
|
||||
gchar **model_pieces;
|
||||
char *name, *features;
|
||||
|
|
@ -2194,12 +2220,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, Error **errp)
|
|||
error_setg(&error, "Unable to find CPU definition: %s", name);
|
||||
goto out;
|
||||
}
|
||||
xcc = X86_CPU_CLASS(oc);
|
||||
|
||||
if (xcc->kvm_required && !kvm_enabled()) {
|
||||
error_setg(&error, "CPU model '%s' requires KVM", name);
|
||||
goto out;
|
||||
}
|
||||
|
||||
cpu = X86_CPU(object_new(object_class_get_name(oc)));
|
||||
|
||||
|
|
@ -2222,25 +2242,7 @@ out:
|
|||
|
||||
X86CPU *cpu_x86_init(const char *cpu_model)
|
||||
{
|
||||
Error *error = NULL;
|
||||
X86CPU *cpu;
|
||||
|
||||
cpu = cpu_x86_create(cpu_model, &error);
|
||||
if (error) {
|
||||
goto out;
|
||||
}
|
||||
|
||||
object_property_set_bool(OBJECT(cpu), true, "realized", &error);
|
||||
|
||||
out:
|
||||
if (error) {
|
||||
error_report_err(error);
|
||||
if (cpu != NULL) {
|
||||
object_unref(OBJECT(cpu));
|
||||
cpu = NULL;
|
||||
}
|
||||
}
|
||||
return cpu;
|
||||
return X86_CPU(cpu_generic_init(TYPE_X86_CPU, cpu_model));
|
||||
}
|
||||
|
||||
static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
|
||||
|
|
@ -2447,6 +2449,36 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
|||
*edx = 0;
|
||||
}
|
||||
break;
|
||||
case 0xB:
|
||||
/* Extended Topology Enumeration Leaf */
|
||||
if (!cpu->enable_cpuid_0xb) {
|
||||
*eax = *ebx = *ecx = *edx = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
*ecx = count & 0xff;
|
||||
*edx = cpu->apic_id;
|
||||
|
||||
switch (count) {
|
||||
case 0:
|
||||
*eax = apicid_core_offset(smp_cores, smp_threads);
|
||||
*ebx = smp_threads;
|
||||
*ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
|
||||
break;
|
||||
case 1:
|
||||
*eax = apicid_pkg_offset(smp_cores, smp_threads);
|
||||
*ebx = smp_cores * smp_threads;
|
||||
*ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
|
||||
break;
|
||||
default:
|
||||
*eax = 0;
|
||||
*ebx = 0;
|
||||
*ecx |= CPUID_TOPOLOGY_LEVEL_INVALID;
|
||||
}
|
||||
|
||||
assert(!(*eax & ~0x1f));
|
||||
*ebx &= 0xffff; /* The count doesn't need to be reliable. */
|
||||
break;
|
||||
case 0xD: {
|
||||
KVMState *s = cs->kvm_state;
|
||||
uint64_t ena_mask;
|
||||
|
|
@ -2874,12 +2906,37 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
|
|||
CPUX86State *env = &cpu->env;
|
||||
Error *local_err = NULL;
|
||||
static bool ht_warned;
|
||||
FeatureWord w;
|
||||
|
||||
if (xcc->kvm_required && !kvm_enabled()) {
|
||||
char *name = x86_cpu_class_get_model_name(xcc);
|
||||
error_setg(&local_err, "CPU model '%s' requires KVM", name);
|
||||
g_free(name);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (cpu->apic_id < 0) {
|
||||
error_setg(errp, "apic-id property was not initialized properly");
|
||||
return;
|
||||
}
|
||||
|
||||
/*TODO: cpu->host_features incorrectly overwrites features
|
||||
* set using "feat=on|off". Once we fix this, we can convert
|
||||
* plus_features & minus_features to global properties
|
||||
* inside x86_cpu_parse_featurestr() too.
|
||||
*/
|
||||
if (cpu->host_features) {
|
||||
for (w = 0; w < FEATURE_WORDS; w++) {
|
||||
env->features[w] =
|
||||
x86_cpu_get_supported_feature_word(w, cpu->migratable);
|
||||
}
|
||||
}
|
||||
|
||||
for (w = 0; w < FEATURE_WORDS; w++) {
|
||||
cpu->env.features[w] |= plus_features[w];
|
||||
cpu->env.features[w] &= ~minus_features[w];
|
||||
}
|
||||
|
||||
if (env->features[FEAT_7_0_EBX] && env->cpuid_level < 7) {
|
||||
env->cpuid_level = 7;
|
||||
}
|
||||
|
|
@ -3206,6 +3263,7 @@ static Property x86_cpu_properties[] = {
|
|||
DEFINE_PROP_UINT32("xlevel", X86CPU, env.cpuid_xlevel, 0),
|
||||
DEFINE_PROP_UINT32("xlevel2", X86CPU, env.cpuid_xlevel2, 0),
|
||||
DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor_id),
|
||||
DEFINE_PROP_BOOL("cpuid-0xb", X86CPU, enable_cpuid_0xb, true),
|
||||
DEFINE_PROP_END_OF_LIST()
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -636,6 +636,11 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
|
|||
#define CPUID_MWAIT_IBE (1U << 1) /* Interrupts can exit capability */
|
||||
#define CPUID_MWAIT_EMX (1U << 0) /* enumeration supported */
|
||||
|
||||
/* CPUID[0xB].ECX level types */
|
||||
#define CPUID_TOPOLOGY_LEVEL_INVALID (0U << 8)
|
||||
#define CPUID_TOPOLOGY_LEVEL_SMT (1U << 8)
|
||||
#define CPUID_TOPOLOGY_LEVEL_CORE (2U << 8)
|
||||
|
||||
#ifndef HYPERV_SPINLOCK_NEVER_RETRY
|
||||
#define HYPERV_SPINLOCK_NEVER_RETRY 0xFFFFFFFF
|
||||
#endif
|
||||
|
|
@ -1173,6 +1178,9 @@ struct X86CPU {
|
|||
*/
|
||||
bool enable_pmu;
|
||||
|
||||
/* Compatibility bits for old machine types: */
|
||||
bool enable_cpuid_0xb;
|
||||
|
||||
/* in order to simplify APIC support, we leave this pointer to the
|
||||
user */
|
||||
struct DeviceState *apic_state;
|
||||
|
|
|
|||
Loading…
Reference in New Issue