From 2dc7bf63cf77d23b287c8d78628d62046fba1bf4 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Sun, 25 Sep 2022 14:48:03 +0100 Subject: [PATCH 1/3] target/m68k: increase size of m68k CPU features from uint32_t to uint64_t MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are already 32 feature bits in use, so change the size of the m68k CPU features to uint64_t (along with the associated m68k_feature() functions) to allow up to 64 feature bits to be used. At the same time make use of the BIT_ULL() macro when reading/writing the CPU feature bits to improve readability, and also update m68k_feature() to return a bool rather than an int. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220925134804.139706-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier --- target/m68k/cpu.c | 4 ++-- target/m68k/cpu.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index f681be3a2a..8d23c72056 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -38,12 +38,12 @@ static bool m68k_cpu_has_work(CPUState *cs) static void m68k_set_feature(CPUM68KState *env, int feature) { - env->features |= (1u << feature); + env->features |= BIT_ULL(feature); } static void m68k_unset_feature(CPUM68KState *env, int feature) { - env->features &= (-1u - (1u << feature)); + env->features &= ~BIT_ULL(feature); } static void m68k_cpu_reset(DeviceState *dev) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 67b6c12c28..f5c6e95cb4 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -154,7 +154,7 @@ typedef struct CPUArchState { struct {} end_reset_fields; /* Fields from here on are preserved across CPU reset. */ - uint32_t features; + uint64_t features; } CPUM68KState; /* @@ -539,9 +539,9 @@ enum m68k_features { M68K_FEATURE_TRAPCC, }; -static inline int m68k_feature(CPUM68KState *env, int feature) +static inline bool m68k_feature(CPUM68KState *env, int feature) { - return (env->features & (1u << feature)) != 0; + return (env->features & BIT_ULL(feature)) != 0; } void m68k_cpu_list(void); From b342e56b23dc2a0a1f30e21d67d001a1d0befbf0 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Sun, 25 Sep 2022 14:48:04 +0100 Subject: [PATCH 2/3] target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check Now that M68K_FEATURE_M68000 has been renamed to M68K_FEATURE_M68K it is easier to see that the privilege exception check is wrong: it is currently only generated for ColdFire CPUs when in fact it should also be generated for Motorola CPUs from the 68010 onwards. Introduce a new M68K_FEATURE_MOVEFROMSR_PRIV feature which is set for all non- Motorola CPUs, and for all Motorola CPUs from the 68010 onwards and use it to determine whether a privilege exception should be generated for the MOVE-from-SR instruction. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20220925134804.139706-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier --- target/m68k/cpu.c | 5 +++++ target/m68k/cpu.h | 2 ++ target/m68k/translate.c | 2 +- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 8d23c72056..25d610db21 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -102,6 +102,7 @@ static void m5206_cpu_initfn(Object *obj) CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* Base feature set, including isns. for m68k family */ @@ -129,6 +130,7 @@ static void m68010_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_RTD); m68k_set_feature(env, M68K_FEATURE_BKPT); m68k_set_feature(env, M68K_FEATURE_MOVEC); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* @@ -241,6 +243,7 @@ static void m5208_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void cfv4e_cpu_initfn(Object *obj) @@ -254,6 +257,7 @@ static void cfv4e_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CF_FPU); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void any_cpu_initfn(Object *obj) @@ -275,6 +279,7 @@ static void any_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index f5c6e95cb4..3a9cfe2f33 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -537,6 +537,8 @@ enum m68k_features { M68K_FEATURE_UNALIGNED_DATA, /* TRAPcc insn. (680[2346]0, and CPU32) */ M68K_FEATURE_TRAPCC, + /* MOVE from SR privileged (from 68010) */ + M68K_FEATURE_MOVEFROMSR_PRIV, }; static inline bool m68k_feature(CPUM68KState *env, int feature) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 233b9d8e57..9df17aa4b2 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4624,7 +4624,7 @@ DISAS_INSN(move_from_sr) { TCGv sr; - if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68K)) { + if (IS_USER(s) && m68k_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } From 2cfa963126fe77fac034a43f986b2bf3e8fe6a4f Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Mon, 26 Sep 2022 13:39:00 +0200 Subject: [PATCH 3/3] m68k: align bootinfo strings and data to 4 bytes Various tools, such as kexec-tools and m68k-bootinfo, expect each bootinfo entry to be aligned to 4 bytes, not 2 bytes. So adjust the padding to fill this out as such. Also, break apart the padding additions from the other field length additions, so that it's more clear why these magic numbers are being added, and comment them too. Reported-by: Geert Uytterhoeven Cc: Laurent Vivier Signed-off-by: Jason A. Donenfeld Reviewed-by: Laurent Vivier Message-Id: <20220926113900.1256630-2-Jason@zx2c4.com> Signed-off-by: Laurent Vivier --- hw/m68k/bootinfo.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/m68k/bootinfo.h b/hw/m68k/bootinfo.h index bd8b212fd3..897162b818 100644 --- a/hw/m68k/bootinfo.h +++ b/hw/m68k/bootinfo.h @@ -48,13 +48,14 @@ stw_phys(as, base, id); \ base += 2; \ stw_phys(as, base, \ - (sizeof(struct bi_record) + strlen(string) + 2) & ~1); \ + (sizeof(struct bi_record) + strlen(string) + \ + 1 /* null termination */ + 3 /* padding */) & ~3); \ base += 2; \ for (i = 0; string[i]; i++) { \ stb_phys(as, base++, string[i]); \ } \ stb_phys(as, base++, 0); \ - base = (base + 1) & ~1; \ + base = (base + 3) & ~3; \ } while (0) #define BOOTINFODATA(as, base, id, data, len) \ @@ -63,13 +64,14 @@ stw_phys(as, base, id); \ base += 2; \ stw_phys(as, base, \ - (sizeof(struct bi_record) + len + 3) & ~1); \ + (sizeof(struct bi_record) + len + \ + 2 /* length field */ + 3 /* padding */) & ~3); \ base += 2; \ stw_phys(as, base, len); \ base += 2; \ for (i = 0; i < len; ++i) { \ stb_phys(as, base++, data[i]); \ } \ - base = (base + 1) & ~1; \ + base = (base + 3) & ~3; \ } while (0) #endif