mirror of https://github.com/xemu-project/xemu.git
factorized cpu defines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@243 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
d19893dab5
commit
5a9fdfec7e
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@ -0,0 +1,307 @@
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/*
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* defines common to all virtual CPUs
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef CPU_ALL_H
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#define CPU_ALL_H
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/* all CPU memory access use these macros */
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static inline int ldub(void *ptr)
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{
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return *(uint8_t *)ptr;
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}
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static inline int ldsb(void *ptr)
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{
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return *(int8_t *)ptr;
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}
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static inline void stb(void *ptr, int v)
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{
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*(uint8_t *)ptr = v;
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}
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/* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
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kernel handles unaligned load/stores may give better results, but
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it is a system wide setting : bad */
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#if defined(WORDS_BIGENDIAN) || defined(__arm__)
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/* conservative code for little endian unaligned accesses */
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static inline int lduw(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8);
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#endif
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}
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static inline int ldsw(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return (int16_t)val;
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#else
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uint8_t *p = ptr;
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return (int16_t)(p[0] | (p[1] << 8));
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#endif
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}
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static inline int ldl(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
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#endif
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}
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static inline uint64_t ldq(void *ptr)
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{
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uint8_t *p = ptr;
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uint32_t v1, v2;
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v1 = ldl(p);
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v2 = ldl(p + 4);
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return v1 | ((uint64_t)v2 << 32);
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}
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static inline void stw(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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p[1] = v >> 8;
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#endif
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}
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static inline void stl(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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p[1] = v >> 8;
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p[2] = v >> 16;
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p[3] = v >> 24;
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#endif
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}
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static inline void stq(void *ptr, uint64_t v)
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{
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uint8_t *p = ptr;
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stl(p, (uint32_t)v);
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stl(p + 4, v >> 32);
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}
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/* float access */
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static inline float ldfl(void *ptr)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.i = ldl(ptr);
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return u.f;
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}
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static inline void stfl(void *ptr, float v)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.f = v;
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stl(ptr, u.i);
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}
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#if defined(__arm__) && !defined(WORDS_BIGENDIAN)
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/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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static inline double ldfq(void *ptr)
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{
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union {
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double d;
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uint32_t tab[2];
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} u;
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u.tab[1] = ldl(ptr);
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u.tab[0] = ldl(ptr + 4);
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return u.d;
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}
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static inline void stfq(void *ptr, double v)
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{
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union {
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double d;
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uint32_t tab[2];
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} u;
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u.d = v;
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stl(ptr, u.tab[1]);
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stl(ptr + 4, u.tab[0]);
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}
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#else
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static inline double ldfq(void *ptr)
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{
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union {
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double d;
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uint64_t i;
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} u;
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u.i = ldq(ptr);
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return u.d;
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}
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static inline void stfq(void *ptr, double v)
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{
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union {
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double d;
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uint64_t i;
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} u;
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u.d = v;
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stq(ptr, u.i);
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}
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#endif
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#else
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static inline int lduw(void *ptr)
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{
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return *(uint16_t *)ptr;
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}
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static inline int ldsw(void *ptr)
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{
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return *(int16_t *)ptr;
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}
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static inline int ldl(void *ptr)
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{
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return *(uint32_t *)ptr;
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}
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static inline uint64_t ldq(void *ptr)
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{
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return *(uint64_t *)ptr;
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}
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static inline void stw(void *ptr, int v)
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{
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*(uint16_t *)ptr = v;
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}
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static inline void stl(void *ptr, int v)
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{
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*(uint32_t *)ptr = v;
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}
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static inline void stq(void *ptr, uint64_t v)
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{
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*(uint64_t *)ptr = v;
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}
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/* float access */
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static inline float ldfl(void *ptr)
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{
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return *(float *)ptr;
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}
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static inline double ldfq(void *ptr)
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{
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return *(double *)ptr;
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}
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static inline void stfl(void *ptr, float v)
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{
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*(float *)ptr = v;
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}
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static inline void stfq(void *ptr, double v)
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{
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*(double *)ptr = v;
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}
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#endif
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/* page related stuff */
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#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
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#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
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#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
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extern unsigned long real_host_page_size;
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extern unsigned long host_page_bits;
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extern unsigned long host_page_size;
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extern unsigned long host_page_mask;
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#define HOST_PAGE_ALIGN(addr) (((addr) + host_page_size - 1) & host_page_mask)
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/* same as PROT_xxx */
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#define PAGE_READ 0x0001
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#define PAGE_WRITE 0x0002
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#define PAGE_EXEC 0x0004
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#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
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#define PAGE_VALID 0x0008
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/* original state of the write flag (used when tracking self-modifying
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code */
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#define PAGE_WRITE_ORG 0x0010
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void page_dump(FILE *f);
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int page_get_flags(unsigned long address);
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void page_set_flags(unsigned long start, unsigned long end, int flags);
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void page_unprotect_range(uint8_t *data, unsigned long data_size);
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#define SINGLE_CPU_DEFINES
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#ifdef SINGLE_CPU_DEFINES
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#if defined(TARGET_I386)
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#define CPUState CPUX86State
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#define cpu_init cpu_x86_init
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#define cpu_exec cpu_x86_exec
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#define cpu_gen_code cpu_x86_gen_code
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#define cpu_interrupt cpu_x86_interrupt
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#define cpu_signal_handler cpu_x86_signal_handler
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#elif defined(TARGET_ARM)
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#define CPUState CPUARMState
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#define cpu_init cpu_arm_init
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#define cpu_exec cpu_arm_exec
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#define cpu_gen_code cpu_arm_gen_code
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#define cpu_interrupt cpu_arm_interrupt
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#define cpu_signal_handler cpu_arm_signal_handler
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#else
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#error unsupported target CPU
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#endif
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#endif
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#endif /* CPU_ALL_H */
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254
cpu-i386.h
254
cpu-i386.h
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@ -222,233 +222,6 @@ typedef struct CPUX86State {
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void *opaque;
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} CPUX86State;
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/* all CPU memory access use these macros */
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static inline int ldub(void *ptr)
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{
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return *(uint8_t *)ptr;
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}
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static inline int ldsb(void *ptr)
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{
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return *(int8_t *)ptr;
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}
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static inline void stb(void *ptr, int v)
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{
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*(uint8_t *)ptr = v;
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}
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/* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
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kernel handles unaligned load/stores may give better results, but
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it is a system wide setting : bad */
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#if defined(WORDS_BIGENDIAN) || defined(__arm__)
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/* conservative code for little endian unaligned accesses */
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static inline int lduw(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8);
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#endif
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}
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static inline int ldsw(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return (int16_t)val;
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#else
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uint8_t *p = ptr;
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return (int16_t)(p[0] | (p[1] << 8));
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#endif
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}
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static inline int ldl(void *ptr)
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{
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#ifdef __powerpc__
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int val;
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__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
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return val;
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#else
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uint8_t *p = ptr;
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return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
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#endif
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}
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static inline uint64_t ldq(void *ptr)
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{
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uint8_t *p = ptr;
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uint32_t v1, v2;
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v1 = ldl(p);
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v2 = ldl(p + 4);
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return v1 | ((uint64_t)v2 << 32);
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}
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static inline void stw(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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p[1] = v >> 8;
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#endif
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}
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static inline void stl(void *ptr, int v)
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{
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#ifdef __powerpc__
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__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
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#else
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uint8_t *p = ptr;
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p[0] = v;
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p[1] = v >> 8;
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p[2] = v >> 16;
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p[3] = v >> 24;
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#endif
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}
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static inline void stq(void *ptr, uint64_t v)
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{
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uint8_t *p = ptr;
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stl(p, (uint32_t)v);
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stl(p + 4, v >> 32);
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}
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/* float access */
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static inline float ldfl(void *ptr)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.i = ldl(ptr);
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return u.f;
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}
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|
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static inline void stfl(void *ptr, float v)
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{
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union {
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float f;
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uint32_t i;
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} u;
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u.f = v;
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stl(ptr, u.i);
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}
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|
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#if defined(__arm__) && !defined(WORDS_BIGENDIAN)
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|
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/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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static inline double ldfq(void *ptr)
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{
|
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union {
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double d;
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uint32_t tab[2];
|
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} u;
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u.tab[1] = ldl(ptr);
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u.tab[0] = ldl(ptr + 4);
|
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return u.d;
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}
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|
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static inline void stfq(void *ptr, double v)
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{
|
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union {
|
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double d;
|
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uint32_t tab[2];
|
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} u;
|
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u.d = v;
|
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stl(ptr, u.tab[1]);
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stl(ptr + 4, u.tab[0]);
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}
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#else
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static inline double ldfq(void *ptr)
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{
|
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union {
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double d;
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uint64_t i;
|
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} u;
|
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u.i = ldq(ptr);
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return u.d;
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}
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|
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static inline void stfq(void *ptr, double v)
|
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{
|
||||
union {
|
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double d;
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uint64_t i;
|
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} u;
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u.d = v;
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stq(ptr, u.i);
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}
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#endif
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#else
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static inline int lduw(void *ptr)
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{
|
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return *(uint16_t *)ptr;
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}
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static inline int ldsw(void *ptr)
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{
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return *(int16_t *)ptr;
|
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}
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|
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static inline int ldl(void *ptr)
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{
|
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return *(uint32_t *)ptr;
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}
|
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|
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static inline uint64_t ldq(void *ptr)
|
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{
|
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return *(uint64_t *)ptr;
|
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}
|
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|
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static inline void stw(void *ptr, int v)
|
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{
|
||||
*(uint16_t *)ptr = v;
|
||||
}
|
||||
|
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static inline void stl(void *ptr, int v)
|
||||
{
|
||||
*(uint32_t *)ptr = v;
|
||||
}
|
||||
|
||||
static inline void stq(void *ptr, uint64_t v)
|
||||
{
|
||||
*(uint64_t *)ptr = v;
|
||||
}
|
||||
|
||||
/* float access */
|
||||
|
||||
static inline float ldfl(void *ptr)
|
||||
{
|
||||
return *(float *)ptr;
|
||||
}
|
||||
|
||||
static inline double ldfq(void *ptr)
|
||||
{
|
||||
return *(double *)ptr;
|
||||
}
|
||||
|
||||
static inline void stfl(void *ptr, float v)
|
||||
{
|
||||
*(float *)ptr = v;
|
||||
}
|
||||
|
||||
static inline void stfq(void *ptr, double v)
|
||||
{
|
||||
*(double *)ptr = v;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef IN_OP_I386
|
||||
void cpu_x86_outb(CPUX86State *env, int addr, int val);
|
||||
void cpu_x86_outw(CPUX86State *env, int addr, int val);
|
||||
|
|
@ -482,32 +255,7 @@ int cpu_x86_signal_handler(int host_signum, struct siginfo *info,
|
|||
#define X86_DUMP_CCOP 0x0002 /* dump qemu flag cache */
|
||||
void cpu_x86_dump_state(CPUX86State *env, FILE *f, int flags);
|
||||
|
||||
/* page related stuff */
|
||||
#define TARGET_PAGE_BITS 12
|
||||
#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
|
||||
#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
|
||||
#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
|
||||
|
||||
extern unsigned long real_host_page_size;
|
||||
extern unsigned long host_page_bits;
|
||||
extern unsigned long host_page_size;
|
||||
extern unsigned long host_page_mask;
|
||||
|
||||
#define HOST_PAGE_ALIGN(addr) (((addr) + host_page_size - 1) & host_page_mask)
|
||||
|
||||
/* same as PROT_xxx */
|
||||
#define PAGE_READ 0x0001
|
||||
#define PAGE_WRITE 0x0002
|
||||
#define PAGE_EXEC 0x0004
|
||||
#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
|
||||
#define PAGE_VALID 0x0008
|
||||
/* original state of the write flag (used when tracking self-modifying
|
||||
code */
|
||||
#define PAGE_WRITE_ORG 0x0010
|
||||
|
||||
void page_dump(FILE *f);
|
||||
int page_get_flags(unsigned long address);
|
||||
void page_set_flags(unsigned long start, unsigned long end, int flags);
|
||||
void page_unprotect_range(uint8_t *data, unsigned long data_size);
|
||||
#include "cpu-all.h"
|
||||
|
||||
#endif /* CPU_I386_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue