sifive_e: Support the revB machine

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

hw/riscv/sifive_e.c

@@ -95,10 +95,14 @@ static void riscv_sifive_e_init(MachineState *machine)
         memmap[SIFIVE_E_DTIM].base, main_mem);
 
     /* Mask ROM reset vector */
-    uint32_t reset_vec[2] = {
+    uint32_t reset_vec[2];
-        0x204002b7,        /* 0x1000: lui     t0,0x20400 */
+
-        0x00028067,        /* 0x1004: jr      t0 */
+    if (s->revb) {
-    };
+        reset_vec[0] = 0x200102b7;        /* 0x1000: lui     t0,0x20010 */
+    } else {
+        reset_vec[0] = 0x204002b7;        /* 0x1000: lui     t0,0x20400 */
+    }
+    reset_vec[1] = 0x00028067;        /* 0x1004: jr      t0 */
 
     /* copy in the reset vector in little_endian byte order */
     for (i = 0; i < sizeof(reset_vec) >> 2; i++) {
@@ -112,8 +116,30 @@ static void riscv_sifive_e_init(MachineState *machine)
     }
 }
 
+static bool sifive_e_machine_get_revb(Object *obj, Error **errp)
+{
+    SiFiveEState *s = RISCV_E_MACHINE(obj);
+
+    return s->revb;
+}
+
+static void sifive_e_machine_set_revb(Object *obj, bool value, Error **errp)
+{
+    SiFiveEState *s = RISCV_E_MACHINE(obj);
+
+    s->revb = value;
+}
+
 static void sifive_e_machine_instance_init(Object *obj)
 {
+    SiFiveEState *s = RISCV_E_MACHINE(obj);
+
+    s->revb = false;
+    object_property_add_bool(obj, "revb", sifive_e_machine_get_revb,
+                             sifive_e_machine_set_revb);
+    object_property_set_description(obj, "revb",
+                                    "Set on to tell QEMU that it should model "
+                                    "the revB HiFive1 board");
 }
 
 static void sifive_e_machine_class_init(ObjectClass *oc, void *data)

include/hw/riscv/sifive_e.h

@@ -45,6 +45,7 @@ typedef struct SiFiveEState {
 
     /*< public >*/
     SiFiveESoCState soc;
+    bool revb;
 } SiFiveEState;
 
 #define TYPE_RISCV_E_MACHINE MACHINE_TYPE_NAME("sifive_e")