mirror of https://github.com/xemu-project/xemu.git
hw/ppc/pnv: fix checkpatch.pl coding style warnings
There were few trailing comments after `/*` instead in new line and line more than 80 character, these fixes are trivial and doesn't change any logic in code. Signed-off-by: Balamuruhan S <bala24@linux.ibm.com> Message-Id: <20190911142925.19197-5-bala24@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
226c9d15df
commit
59b7c1c283
49
hw/ppc/pnv.c
49
hw/ppc/pnv.c
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@ -187,7 +187,8 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
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_FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
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_FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq)));
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_FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
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_FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq)));
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", cpu->hash64_opts->slb_size)));
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size",
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cpu->hash64_opts->slb_size)));
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_FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
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_FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
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_FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
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_FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
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@ -200,19 +201,23 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
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segs, sizeof(segs))));
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segs, sizeof(segs))));
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}
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}
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/* Advertise VMX/VSX (vector extensions) if available
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/*
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* Advertise VMX/VSX (vector extensions) if available
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* 0 / no property == no vector extensions
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* 0 / no property == no vector extensions
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* 1 == VMX / Altivec available
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* 1 == VMX / Altivec available
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* 2 == VSX available */
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* 2 == VSX available
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*/
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if (env->insns_flags & PPC_ALTIVEC) {
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if (env->insns_flags & PPC_ALTIVEC) {
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uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
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uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx)));
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}
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}
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/* Advertise DFP (Decimal Floating Point) if available
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/*
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* Advertise DFP (Decimal Floating Point) if available
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* 0 / no property == no DFP
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* 0 / no property == no DFP
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* 1 == DFP available */
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* 1 == DFP available
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*/
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if (env->insns_flags2 & PPC2_DFP) {
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if (env->insns_flags2 & PPC2_DFP) {
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
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_FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1)));
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}
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}
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@ -424,7 +429,8 @@ static int pnv_dt_isa_device(DeviceState *dev, void *opaque)
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return 0;
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return 0;
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}
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}
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/* The default LPC bus of a multichip system is on chip 0. It's
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/*
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* The default LPC bus of a multichip system is on chip 0. It's
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* recognized by the firmware (skiboot) using a "primary" property.
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* recognized by the firmware (skiboot) using a "primary" property.
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*/
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*/
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static void pnv_dt_isa(PnvMachineState *pnv, void *fdt)
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static void pnv_dt_isa(PnvMachineState *pnv, void *fdt)
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@ -442,8 +448,10 @@ static void pnv_dt_isa(PnvMachineState *pnv, void *fdt)
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assert(phandle > 0);
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assert(phandle > 0);
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_FDT((fdt_setprop_cell(fdt, isa_offset, "phandle", phandle)));
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_FDT((fdt_setprop_cell(fdt, isa_offset, "phandle", phandle)));
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/* ISA devices are not necessarily parented to the ISA bus so we
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/*
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* can not use object_child_foreach() */
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* ISA devices are not necessarily parented to the ISA bus so we
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* can not use object_child_foreach()
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*/
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qbus_walk_children(BUS(pnv->isa_bus), pnv_dt_isa_device, NULL, NULL, NULL,
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qbus_walk_children(BUS(pnv->isa_bus), pnv_dt_isa_device, NULL, NULL, NULL,
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&args);
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&args);
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}
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}
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@ -545,7 +553,8 @@ static void pnv_reset(MachineState *machine)
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qemu_devices_reset();
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qemu_devices_reset();
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/* OpenPOWER systems have a BMC, which can be defined on the
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/*
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* OpenPOWER systems have a BMC, which can be defined on the
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* command line with:
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* command line with:
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*
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*
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* -device ipmi-bmc-sim,id=bmc0
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* -device ipmi-bmc-sim,id=bmc0
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@ -705,7 +714,8 @@ static void pnv_init(MachineState *machine)
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pnv->chips[i] = PNV_CHIP(chip);
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pnv->chips[i] = PNV_CHIP(chip);
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/* TODO: put all the memory in one node on chip 0 until we find a
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/*
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* TODO: put all the memory in one node on chip 0 until we find a
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* way to specify different ranges for each chip
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* way to specify different ranges for each chip
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*/
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*/
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if (i == 0) {
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if (i == 0) {
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@ -732,8 +742,10 @@ static void pnv_init(MachineState *machine)
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/* Create an RTC ISA device too */
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/* Create an RTC ISA device too */
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mc146818_rtc_init(pnv->isa_bus, 2000, NULL);
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mc146818_rtc_init(pnv->isa_bus, 2000, NULL);
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/* OpenPOWER systems use a IPMI SEL Event message to notify the
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/*
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* host to powerdown */
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* OpenPOWER systems use a IPMI SEL Event message to notify the
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* host to powerdown
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*/
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pnv->powerdown_notifier.notify = pnv_powerdown_notify;
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pnv->powerdown_notifier.notify = pnv_powerdown_notify;
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qemu_register_powerdown_notifier(&pnv->powerdown_notifier);
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qemu_register_powerdown_notifier(&pnv->powerdown_notifier);
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}
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}
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@ -803,7 +815,8 @@ static void pnv_chip_power9_intc_create(PnvChip *chip, PowerPCCPU *cpu,
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pnv_cpu->intc = obj;
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pnv_cpu->intc = obj;
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}
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}
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/* Allowed core identifiers on a POWER8 Processor Chip :
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/*
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* Allowed core identifiers on a POWER8 Processor Chip :
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*
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*
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* <EX0 reserved>
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* <EX0 reserved>
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* EX1 - Venice only
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* EX1 - Venice only
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@ -923,8 +936,10 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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(uint64_t) PNV_XSCOM_BASE(chip),
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(uint64_t) PNV_XSCOM_BASE(chip),
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PNV_XSCOM_LPC_BASE);
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PNV_XSCOM_LPC_BASE);
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/* Interrupt Management Area. This is the memory region holding
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/*
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* all the Interrupt Control Presenter (ICP) registers */
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* Interrupt Management Area. This is the memory region holding
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* all the Interrupt Control Presenter (ICP) registers
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*/
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pnv_chip_icp_realize(chip8, &local_err);
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pnv_chip_icp_realize(chip8, &local_err);
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if (local_err) {
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if (local_err) {
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error_propagate(errp, local_err);
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error_propagate(errp, local_err);
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@ -1404,8 +1419,8 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data)
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mc->init = pnv_init;
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mc->init = pnv_init;
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mc->reset = pnv_reset;
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mc->reset = pnv_reset;
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mc->max_cpus = MAX_CPUS;
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mc->max_cpus = MAX_CPUS;
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mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for
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/* Pnv provides a AHCI device for storage */
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* storage */
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mc->block_default_type = IF_IDE;
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mc->no_parallel = 1;
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mc->no_parallel = 1;
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mc->default_boot_order = NULL;
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mc->default_boot_order = NULL;
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/*
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/*
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