mirror of https://github.com/xemu-project/xemu.git
target-arm: make arm_current_el() return EL3
Make arm_current_el() return EL3 for secure PL1 and monitor mode. Increase MMU modes since mmu_index is directly inferred from arm_ current_el(). Change assertion in arm_el_is_aa64() to allow EL3. Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1413910544-20150-6-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -100,7 +100,7 @@ typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info,
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struct arm_boot_info;
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#define NB_MMU_MODES 2
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#define NB_MMU_MODES 4
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/* We currently assume float and double are IEEE single and double
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precision respectively.
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@ -803,11 +803,12 @@ static inline bool arm_is_secure(CPUARMState *env)
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/* Return true if the specified exception level is running in AArch64 state. */
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static inline bool arm_el_is_aa64(CPUARMState *env, int el)
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{
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/* We don't currently support EL2 or EL3, and this isn't valid for EL0
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/* We don't currently support EL2, and this isn't valid for EL0
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* (if we're in EL0, is_a64() is what you want, and if we're not in EL0
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* then the state of EL0 isn't well defined.)
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*/
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assert(el == 1);
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assert(el == 1 || el == 3);
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/* AArch64-capable CPUs always run with EL1 in AArch64 mode. This
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* is a QEMU-imposed simplification which we may wish to change later.
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* If we in future support EL2 and/or EL3, then the state of lower
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@ -996,17 +997,27 @@ static inline bool cptype_valid(int cptype)
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*/
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static inline int arm_current_el(CPUARMState *env)
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{
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if (env->aarch64) {
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if (is_a64(env)) {
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return extract32(env->pstate, 2, 2);
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}
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if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_USR) {
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switch (env->uncached_cpsr & 0x1f) {
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case ARM_CPU_MODE_USR:
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return 0;
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case ARM_CPU_MODE_HYP:
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return 2;
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case ARM_CPU_MODE_MON:
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return 3;
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default:
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if (arm_is_secure(env) && !arm_el_is_aa64(env, 3)) {
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/* If EL3 is 32-bit then all secure privileged modes run in
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* EL3
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*/
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return 3;
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}
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return 1;
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}
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/* We don't currently implement the Virtualization or TrustZone
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* extensions, so EL2 and EL3 don't exist for us.
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*/
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return 1;
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}
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typedef struct ARMCPRegInfo ARMCPRegInfo;
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