From 57f8dbdbe94a502301f51809e8b282b02df43370 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 29 May 2024 13:18:56 +0200 Subject: [PATCH] target/i386: implement DR7.GD DR7.GD triggers a #DB exception on any access to debug registers. The GD bit is cleared so that the #DB handler itself can access the debug registers. Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/bpt_helper.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c index 4d96a48a3c..c1d5fce250 100644 --- a/target/i386/tcg/sysemu/bpt_helper.c +++ b/target/i386/tcg/sysemu/bpt_helper.c @@ -238,6 +238,12 @@ target_ulong helper_get_dr(CPUX86State *env, int reg) } } + if (env->dr[7] & DR7_GD) { + env->dr[7] &= ~DR7_GD; + env->dr[6] |= DR6_BD; + raise_exception_ra(env, EXCP01_DB, GETPC()); + } + return env->dr[reg]; } @@ -251,6 +257,12 @@ void helper_set_dr(CPUX86State *env, int reg, target_ulong t0) } } + if (env->dr[7] & DR7_GD) { + env->dr[7] &= ~DR7_GD; + env->dr[6] |= DR6_BD; + raise_exception_ra(env, EXCP01_DB, GETPC()); + } + if (reg < 4) { if (hw_breakpoint_enabled(env->dr[7], reg) && hw_breakpoint_type(env->dr[7], reg) != DR7_TYPE_IO_RW) {