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target/m68k: Drop mark_to_release 

Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-24 19:09:19 -10:00
parent 34aac056a4
commit 54dc8d2f91
1 changed files with 13 additions and 42 deletions
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55
target/m68k/translate.c
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@ -121,35 +121,9 @@ typedef struct DisasContext {
int done_mac;
int writeback_mask;
TCGv writeback[8];
#define MAX_TO_RELEASE 8
int release_count;
TCGv release[MAX_TO_RELEASE];
bool ss_active;
} DisasContext;
static void init_release_array(DisasContext *s)
{
#ifdef CONFIG_DEBUG_TCG
memset(s->release, 0, sizeof(s->release));
#endif
s->release_count = 0;
}
static void do_release(DisasContext *s)
{
int i;
for (i = 0; i < s->release_count; i++) {
tcg_temp_free(s->release[i]);
}
init_release_array(s);
}
static TCGv mark_to_release(DisasContext *s, TCGv tmp)
{
g_assert(s->release_count < MAX_TO_RELEASE);
return s->release[s->release_count++] = tmp;
}
static TCGv get_areg(DisasContext *s, unsigned regno)
{
if (s->writeback_mask & (1 << regno)) {
@ -396,8 +370,7 @@ static TCGv gen_ldst(DisasContext *s, int opsize, TCGv addr, TCGv val,
gen_store(s, opsize, addr, val, index);
return store_dummy;
} else {
return mark_to_release(s, gen_load(s, opsize, addr,
what == EA_LOADS, index));
return gen_load(s, opsize, addr, what == EA_LOADS, index);
}
}
@ -491,7 +464,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
} else {
bd = 0;
}
tmp = mark_to_release(s, tcg_temp_new());
tmp = tcg_temp_new();
if ((ext & 0x44) == 0) {
/* pre-index */
add = gen_addr_index(s, ext, tmp);
@ -501,7 +474,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
if ((ext & 0x80) == 0) {
/* base not suppressed */
if (IS_NULL_QREG(base)) {
base = mark_to_release(s, tcg_const_i32(offset + bd));
base = tcg_const_i32(offset + bd);
bd = 0;
}
if (!IS_NULL_QREG(add)) {
@ -517,11 +490,11 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
add = tmp;
}
} else {
add = mark_to_release(s, tcg_const_i32(bd));
add = tcg_const_i32(bd);
}
if ((ext & 3) != 0) {
/* memory indirect */
base = mark_to_release(s, gen_load(s, OS_LONG, add, 0, IS_USER(s)));
base = gen_load(s, OS_LONG, add, 0, IS_USER(s));
if ((ext & 0x44) == 4) {
add = gen_addr_index(s, ext, tmp);
tcg_gen_add_i32(tmp, add, base);
@ -546,7 +519,7 @@ static TCGv gen_lea_indexed(CPUM68KState *env, DisasContext *s, TCGv base)
}
} else {
/* brief extension word format */
tmp = mark_to_release(s, tcg_temp_new());
tmp = tcg_temp_new();
add = gen_addr_index(s, ext, tmp);
if (!IS_NULL_QREG(base)) {
tcg_gen_add_i32(tmp, add, base);
@ -676,7 +649,7 @@ static inline TCGv gen_extend(DisasContext *s, TCGv val, int opsize, int sign)
if (opsize == OS_LONG) {
tmp = val;
} else {
tmp = mark_to_release(s, tcg_temp_new());
tmp = tcg_temp_new();
gen_ext(tmp, val, opsize, sign);
}
@ -802,7 +775,7 @@ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext *s,
return NULL_QREG;
}
reg = get_areg(s, reg0);
tmp = mark_to_release(s, tcg_temp_new());
tmp = tcg_temp_new();
if (reg0 == 7 && opsize == OS_BYTE &&
m68k_feature(s->env, M68K_FEATURE_M68K)) {
tcg_gen_subi_i32(tmp, reg, 2);
@ -812,7 +785,7 @@ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext *s,
return tmp;
case 5: /* Indirect displacement. */
reg = get_areg(s, reg0);
tmp = mark_to_release(s, tcg_temp_new());
tmp = tcg_temp_new();
ext = read_im16(env, s);
tcg_gen_addi_i32(tmp, reg, (int16_t)ext);
return tmp;
@ -823,14 +796,14 @@ static TCGv gen_lea_mode(CPUM68KState *env, DisasContext *s,
switch (reg0) {
case 0: /* Absolute short. */
offset = (int16_t)read_im16(env, s);
return mark_to_release(s, tcg_const_i32(offset));
return tcg_const_i32(offset);
case 1: /* Absolute long. */
offset = read_im32(env, s);
return mark_to_release(s, tcg_const_i32(offset));
return tcg_const_i32(offset);
case 2: /* pc displacement */
offset = s->pc;
offset += (int16_t)read_im16(env, s);
return mark_to_release(s, tcg_const_i32(offset));
return tcg_const_i32(offset);
case 3: /* pc index+displacement. */
return gen_lea_indexed(env, s, NULL_QREG);
case 4: /* Immediate. */
@ -958,7 +931,7 @@ static TCGv gen_ea_mode(CPUM68KState *env, DisasContext *s, int mode, int reg0,
default:
g_assert_not_reached();
}
return mark_to_release(s, tcg_const_i32(offset));
return tcg_const_i32(offset);
default:
return NULL_QREG;
}
@ -6287,7 +6260,6 @@ static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
dc->cc_op_synced = 1;
dc->done_mac = 0;
dc->writeback_mask = 0;
init_release_array(dc);
dc->ss_active = (M68K_SR_TRACE(env->sr) == M68K_SR_TRACE_ANY_INS);
/* If architectural single step active, limit to 1 */
@ -6314,7 +6286,6 @@ static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
opcode_table[insn](env, dc, insn);
do_writebacks(dc);
do_release(dc);
dc->pc_prev = dc->base.pc_next;
dc->base.pc_next = dc->pc;