mirror of https://github.com/xemu-project/xemu.git
i386: Expose module level in CPUID[0x1F]
Linux kernel (from v6.4, with commit edc0a2b595765 ("x86/topology: Fix erroneous smp_num_siblings on Intel Hybrid platforms") is able to handle platforms with Module level enumerated via CPUID.1F. Expose the module level in CPUID[0x1F] if the machine has more than 1 modules. Tested-by: Yongwei Ma <yongwei.ma@intel.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Tested-by: Babu Moger <babu.moger@amd.com> Message-ID: <20240424154929.1487382-15-zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -273,7 +273,7 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
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if (ms->smp.modules > 1) {
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env->nr_modules = ms->smp.modules;
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/* TODO: Expose module level in CPUID[0x1F]. */
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set_bit(CPU_TOPO_LEVEL_MODULE, env->avail_cpu_topo);
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}
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if (ms->smp.dies > 1) {
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@ -71,6 +71,7 @@ enum CPUTopoLevel {
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CPU_TOPO_LEVEL_INVALID,
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CPU_TOPO_LEVEL_SMT,
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CPU_TOPO_LEVEL_CORE,
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CPU_TOPO_LEVEL_MODULE,
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CPU_TOPO_LEVEL_DIE,
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CPU_TOPO_LEVEL_PACKAGE,
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CPU_TOPO_LEVEL_MAX,
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@ -198,11 +199,12 @@ static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info,
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}
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/*
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* Check whether there's extended topology level (die)?
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* Check whether there's extended topology level (module or die)?
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*/
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static inline bool x86_has_extended_topo(unsigned long *topo_bitmap)
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{
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return test_bit(CPU_TOPO_LEVEL_DIE, topo_bitmap);
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return test_bit(CPU_TOPO_LEVEL_MODULE, topo_bitmap) ||
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test_bit(CPU_TOPO_LEVEL_DIE, topo_bitmap);
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}
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#endif /* HW_I386_TOPOLOGY_H */
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@ -277,6 +277,8 @@ static uint32_t num_threads_by_topo_level(X86CPUTopoInfo *topo_info,
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return 1;
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case CPU_TOPO_LEVEL_CORE:
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return topo_info->threads_per_core;
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case CPU_TOPO_LEVEL_MODULE:
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return topo_info->threads_per_core * topo_info->cores_per_module;
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case CPU_TOPO_LEVEL_DIE:
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return topo_info->threads_per_core * topo_info->cores_per_module *
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topo_info->modules_per_die;
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@ -297,6 +299,8 @@ static uint32_t apicid_offset_by_topo_level(X86CPUTopoInfo *topo_info,
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return 0;
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case CPU_TOPO_LEVEL_CORE:
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return apicid_core_offset(topo_info);
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case CPU_TOPO_LEVEL_MODULE:
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return apicid_module_offset(topo_info);
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case CPU_TOPO_LEVEL_DIE:
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return apicid_die_offset(topo_info);
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case CPU_TOPO_LEVEL_PACKAGE:
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@ -316,6 +320,8 @@ static uint32_t cpuid1f_topo_type(enum CPUTopoLevel topo_level)
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return CPUID_1F_ECX_TOPO_LEVEL_SMT;
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case CPU_TOPO_LEVEL_CORE:
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return CPUID_1F_ECX_TOPO_LEVEL_CORE;
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case CPU_TOPO_LEVEL_MODULE:
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return CPUID_1F_ECX_TOPO_LEVEL_MODULE;
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case CPU_TOPO_LEVEL_DIE:
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return CPUID_1F_ECX_TOPO_LEVEL_DIE;
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default:
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@ -1024,6 +1024,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
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#define CPUID_1F_ECX_TOPO_LEVEL_INVALID CPUID_B_ECX_TOPO_LEVEL_INVALID
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#define CPUID_1F_ECX_TOPO_LEVEL_SMT CPUID_B_ECX_TOPO_LEVEL_SMT
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#define CPUID_1F_ECX_TOPO_LEVEL_CORE CPUID_B_ECX_TOPO_LEVEL_CORE
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#define CPUID_1F_ECX_TOPO_LEVEL_MODULE 3
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#define CPUID_1F_ECX_TOPO_LEVEL_DIE 5
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/* MSR Feature Bits */
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