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target-arm: Add comment about not implementing NSACR.RFR
QEMU doesn't implement the NSACR.RFR bit, which is a permitted IMPDEF in choice in ARMv7 and the only permitted choice in ARMv8. Add a comment to bad_mode_switch() to note that this is why FIQ is always a valid mode regardless of the CPU's Secure state. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-7-git-send-email-peter.maydell@linaro.org
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@ -5214,6 +5214,9 @@ static int bad_mode_switch(CPUARMState *env, int mode)
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case ARM_CPU_MODE_UND:
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case ARM_CPU_MODE_IRQ:
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case ARM_CPU_MODE_FIQ:
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/* Note that we don't implement the IMPDEF NSACR.RFR which in v7
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* allows FIQ mode to be Secure-only. (In v8 this doesn't exist.)
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*/
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return 0;
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case ARM_CPU_MODE_MON:
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return !arm_is_secure(env);
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