mirror of https://github.com/xemu-project/xemu.git
Change Sparc uses of pic_set_irq to pic_set_irq_new
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2572 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
e0353fe250
commit
52cc07d047
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@ -277,7 +277,7 @@ static void slavio_check_interrupts(void *opaque)
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* "irq" here is the bit number in the system interrupt register to
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* separate serial and keyboard interrupts sharing a level.
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*/
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void slavio_pic_set_irq(void *opaque, int irq, int level)
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void pic_set_irq_new(void *opaque, int irq, int level)
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{
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SLAVIO_INTCTLState *s = opaque;
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@ -299,13 +299,13 @@ void slavio_pic_set_irq(void *opaque, int irq, int level)
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}
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}
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void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu)
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void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu)
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{
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SLAVIO_INTCTLState *s = opaque;
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DPRINTF("Set cpu %d local irq %d level %d\n", cpu, irq, level);
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if (cpu == (unsigned int)-1) {
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slavio_pic_set_irq(opaque, irq, level);
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pic_set_irq_new(opaque, irq, level);
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return;
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}
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if (irq < 32) {
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@ -36,6 +36,9 @@
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#ifdef DEBUG_MISC
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#define MISC_DPRINTF(fmt, args...) \
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do { printf("MISC: " fmt , ##args); } while (0)
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#define pic_set_irq_new(intctl, irq, level) \
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do { printf("MISC: set_irq(%d): %d\n", (irq), (level)); \
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pic_set_irq_new((intctl), (irq),(level));} while (0)
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#else
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#define MISC_DPRINTF(fmt, args...)
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#endif
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@ -45,6 +48,7 @@ typedef struct MiscState {
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uint8_t config;
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uint8_t aux1, aux2;
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uint8_t diag, mctrl, sysctrl;
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void *intctl;
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} MiscState;
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#define MISC_MAXADDR 1
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@ -54,9 +58,9 @@ static void slavio_misc_update_irq(void *opaque)
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MiscState *s = opaque;
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if ((s->aux2 & 0x4) && (s->config & 0x8)) {
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pic_set_irq(s->irq, 1);
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pic_set_irq_new(s->intctl, s->irq, 1);
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} else {
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pic_set_irq(s->irq, 0);
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pic_set_irq_new(s->intctl, s->irq, 0);
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}
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}
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@ -207,7 +211,7 @@ static int slavio_misc_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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}
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void *slavio_misc_init(uint32_t base, int irq)
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void *slavio_misc_init(uint32_t base, int irq, void *intctl)
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{
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int slavio_misc_io_memory;
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MiscState *s;
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@ -233,6 +237,7 @@ void *slavio_misc_init(uint32_t base, int irq)
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cpu_register_physical_memory(base + 0xa000000, MISC_MAXADDR, slavio_misc_io_memory);
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s->irq = irq;
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s->intctl = intctl;
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register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load, s);
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qemu_register_reset(slavio_misc_reset, s);
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@ -52,8 +52,9 @@
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#ifdef DEBUG_SERIAL
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#define SER_DPRINTF(fmt, args...) \
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do { printf("SER: " fmt , ##args); } while (0)
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#define pic_set_irq(irq, level) \
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do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0)
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#define pic_set_irq_new(intctl, irq, level) \
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do { printf("SER: set_irq(%d): %d\n", (irq), (level)); \
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pic_set_irq_new((intctl), (irq),(level));} while (0)
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#else
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#define SER_DPRINTF(fmt, args...)
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#endif
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@ -97,6 +98,7 @@ typedef struct ChannelState {
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uint8_t rx, tx, wregs[16], rregs[16];
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SERIOQueue queue;
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CharDriverState *chr;
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void *intctl;
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} ChannelState;
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struct SerialState {
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@ -164,7 +166,7 @@ static void slavio_serial_update_irq(ChannelState *s)
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irq = slavio_serial_update_irq_chn(s);
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irq |= slavio_serial_update_irq_chn(s->otherchn);
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pic_set_irq(s->irq, irq);
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pic_set_irq_new(s->intctl, s->irq, irq);
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}
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static void slavio_serial_reset_chn(ChannelState *s)
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@ -545,7 +547,8 @@ static int slavio_serial_load(QEMUFile *f, void *opaque, int version_id)
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}
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SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2)
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SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
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CharDriverState *chr2, void *intctl)
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{
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int slavio_serial_io_memory, i;
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SerialState *s;
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@ -564,6 +567,7 @@ SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDr
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s->chn[i].irq = irq;
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s->chn[i].chn = 1 - i;
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s->chn[i].type = ser;
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s->chn[i].intctl = intctl;
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if (s->chn[i].chr) {
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qemu_chr_add_handlers(s->chn[i].chr, serial_can_receive,
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serial_receive1, serial_event, &s->chn[i]);
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@ -661,7 +665,7 @@ static void sunmouse_event(void *opaque,
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put_queue(s, 0);
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}
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void slavio_serial_ms_kbd_init(int base, int irq)
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void slavio_serial_ms_kbd_init(int base, int irq, void *intctl)
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{
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int slavio_serial_io_memory, i;
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SerialState *s;
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@ -673,6 +677,7 @@ void slavio_serial_ms_kbd_init(int base, int irq)
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s->chn[i].irq = irq;
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s->chn[i].chn = 1 - i;
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s->chn[i].chr = NULL;
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s->chn[i].intctl = intctl;
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}
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s->chn[0].otherchn = &s->chn[1];
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s->chn[1].otherchn = &s->chn[0];
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@ -28,6 +28,9 @@
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#ifdef DEBUG_TIMER
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#define DPRINTF(fmt, args...) \
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do { printf("TIMER: " fmt , ##args); } while (0)
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#define pic_set_irq_new(intctl, irq, level) \
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do { printf("TIMER: set_irq(%d): %d\n", (irq), (level)); \
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pic_set_irq_new((intctl), (irq),(level));} while (0)
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#else
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#define DPRINTF(fmt, args...)
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#endif
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@ -57,6 +60,7 @@ typedef struct SLAVIO_TIMERState {
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int reached, stopped;
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int mode; // 0 = processor, 1 = user, 2 = system
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unsigned int cpu;
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void *intctl;
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} SLAVIO_TIMERState;
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#define TIMER_MAXADDR 0x1f
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@ -103,7 +107,7 @@ static void slavio_timer_get_out(SLAVIO_TIMERState *s)
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DPRINTF("irq %d limit %d reached %d d %" PRId64 " count %d s->c %x diff %" PRId64 " stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode);
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if (s->mode != 1)
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pic_set_irq_cpu(s->irq, out, s->cpu);
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pic_set_irq_cpu(s->intctl, s->irq, out, s->cpu);
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}
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// timer callback
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@ -130,7 +134,7 @@ static uint32_t slavio_timer_mem_readl(void *opaque, target_phys_addr_t addr)
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// part of counter (user mode)
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if (s->mode != 1) {
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// clear irq
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pic_set_irq_cpu(s->irq, 0, s->cpu);
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pic_set_irq_cpu(s->intctl, s->irq, 0, s->cpu);
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s->reached = 0;
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return s->limit;
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}
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@ -265,7 +269,8 @@ static void slavio_timer_reset(void *opaque)
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slavio_timer_get_out(s);
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}
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void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu)
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void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
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void *intctl)
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{
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int slavio_timer_io_memory;
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SLAVIO_TIMERState *s;
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@ -277,6 +282,7 @@ void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu)
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s->mode = mode;
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s->cpu = cpu;
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s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s);
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s->intctl = intctl;
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slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read,
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slavio_timer_mem_write, s);
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24
hw/sun4m.c
24
hw/sun4m.c
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@ -184,17 +184,7 @@ void irq_info()
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void pic_set_irq(int irq, int level)
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{
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slavio_pic_set_irq(slavio_intctl, irq, level);
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}
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void pic_set_irq_new(void *opaque, int irq, int level)
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{
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pic_set_irq(irq, level);
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}
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void pic_set_irq_cpu(int irq, int level, unsigned int cpu)
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{
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slavio_pic_set_irq_cpu(slavio_intctl, irq, level, cpu);
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pic_set_irq_new(slavio_intctl, irq, level);
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}
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static void *slavio_misc;
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@ -261,15 +251,16 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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nvram = m48t59_init(0, hwdef->nvram_base, 0, hwdef->nvram_size, 8);
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for (i = 0; i < MAX_CPUS; i++) {
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slavio_timer_init(hwdef->counter_base + i * TARGET_PAGE_SIZE,
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hwdef->clock_irq, 0, i);
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hwdef->clock_irq, 0, i, slavio_intctl);
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}
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slavio_timer_init(hwdef->counter_base + 0x10000, hwdef->clock1_irq, 2,
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(unsigned int)-1);
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slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq);
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(unsigned int)-1, slavio_intctl);
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slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq,
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slavio_intctl);
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// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
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// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
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slavio_serial_init(hwdef->serial_base, hwdef->ser_irq,
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serial_hds[1], serial_hds[0]);
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serial_hds[1], serial_hds[0], slavio_intctl);
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fdctrl_init(hwdef->fd_irq, 0, 1, hwdef->fd_base, fd_table);
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main_esp = esp_init(bs_table, hwdef->esp_base, dma);
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@ -279,7 +270,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size,
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}
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}
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slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq);
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slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq,
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slavio_intctl);
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cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
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sparc32_dma_set_reset_data(dma, main_esp, main_lance);
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}
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12
vl.h
12
vl.h
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@ -1144,7 +1144,6 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
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/* sun4m.c */
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extern QEMUMachine ss5_machine, ss10_machine;
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void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
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/* iommu.c */
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void *iommu_init(uint32_t addr);
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@ -1169,6 +1168,7 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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unsigned long vram_offset, int vram_size, int width, int height);
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/* slavio_intctl.c */
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void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
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void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
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const uint32_t *intbit_to_level);
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void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
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@ -1185,14 +1185,16 @@ int load_aout(const char *filename, uint8_t *addr);
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int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
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/* slavio_timer.c */
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void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
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void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
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void *intctl);
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/* slavio_serial.c */
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SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
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void slavio_serial_ms_kbd_init(int base, int irq);
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SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
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CharDriverState *chr2, void *intctl);
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void slavio_serial_ms_kbd_init(int base, int irq, void *intctl);
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/* slavio_misc.c */
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void *slavio_misc_init(uint32_t base, int irq);
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void *slavio_misc_init(uint32_t base, int irq, void *intctl);
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void slavio_set_power_fail(void *opaque, int power_failing);
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/* esp.c */
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