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target/arm: Move sve probe inside kvm >= 4.15 branch 

The test for the IF block indicates no ID registers are exposed, much
less host support for SVE.  Move the SVE probe into the ELSE block.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220726045828.53697-4-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-08-01 16:21:18 +01:00 committed by Peter Maydell
parent b9e8d68a39
commit 5265d24c98
1 changed files with 11 additions and 11 deletions
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22
target/arm/kvm64.c
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@ -679,18 +679,18 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0, err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
ARM64_SYS_REG(3, 3, 9, 12, 0)); ARM64_SYS_REG(3, 3, 9, 12, 0));
} }
}
if (sve_supported) { if (sve_supported) {
/* /*
* There is a range of kernels between kernel commit 73433762fcae * There is a range of kernels between kernel commit 73433762fcae
* and f81cb2c3ad41 which have a bug where the kernel doesn't expose * and f81cb2c3ad41 which have a bug where the kernel doesn't
* SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has enabled * expose SYS_ID_AA64ZFR0_EL1 via the ONE_REG API unless the VM has
* SVE support, which resulted in an error rather than RAZ. * enabled SVE support, which resulted in an error rather than RAZ.
* So only read the register if we set KVM_ARM_VCPU_SVE above. * So only read the register if we set KVM_ARM_VCPU_SVE above.
*/ */
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0, err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64zfr0,
ARM64_SYS_REG(3, 0, 0, 4, 4)); ARM64_SYS_REG(3, 0, 0, 4, 4));
}
} }
kvm_arm_destroy_scratch_host_vcpu(fdarray); kvm_arm_destroy_scratch_host_vcpu(fdarray);