mirror of https://github.com/xemu-project/xemu.git
util/bufferiszero: Use i386 host/cpuinfo.h
Use cpuinfo_init() during init_accel(), and the variable cpuinfo during test_buffer_is_zero_next_accel(). Adjust the logic that cycles through the set of accelerators for testing. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -24,6 +24,7 @@
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#include "qemu/osdep.h"
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#include "qemu/cutils.h"
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#include "qemu/bswap.h"
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#include "host/cpuinfo.h"
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static bool
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buffer_zero_int(const void *buf, size_t len)
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@ -184,111 +185,75 @@ buffer_zero_avx512(const void *buf, size_t len)
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}
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#endif /* CONFIG_AVX512F_OPT */
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/* Note that for test_buffer_is_zero_next_accel, the most preferred
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* ISA must have the least significant bit.
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*/
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#define CACHE_AVX512F 1
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#define CACHE_AVX2 2
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#define CACHE_SSE4 4
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#define CACHE_SSE2 8
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/* Make sure that these variables are appropriately initialized when
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/*
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* Make sure that these variables are appropriately initialized when
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* SSE2 is enabled on the compiler command-line, but the compiler is
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* too old to support CONFIG_AVX2_OPT.
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*/
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#if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT)
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# define INIT_CACHE 0
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# define INIT_ACCEL buffer_zero_int
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# define INIT_USED 0
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# define INIT_LENGTH 0
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# define INIT_ACCEL buffer_zero_int
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#else
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# ifndef __SSE2__
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# error "ISA selection confusion"
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# endif
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# define INIT_CACHE CACHE_SSE2
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# define INIT_ACCEL buffer_zero_sse2
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# define INIT_USED CPUINFO_SSE2
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# define INIT_LENGTH 64
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# define INIT_ACCEL buffer_zero_sse2
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#endif
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static unsigned cpuid_cache = INIT_CACHE;
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static unsigned used_accel = INIT_USED;
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static unsigned length_to_accel = INIT_LENGTH;
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static bool (*buffer_accel)(const void *, size_t) = INIT_ACCEL;
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static int length_to_accel = 64;
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static void init_accel(unsigned cache)
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static unsigned __attribute__((noinline))
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select_accel_cpuinfo(unsigned info)
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{
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bool (*fn)(const void *, size_t) = buffer_zero_int;
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if (cache & CACHE_SSE2) {
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fn = buffer_zero_sse2;
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length_to_accel = 64;
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}
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#ifdef CONFIG_AVX2_OPT
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if (cache & CACHE_SSE4) {
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fn = buffer_zero_sse4;
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length_to_accel = 64;
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}
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if (cache & CACHE_AVX2) {
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fn = buffer_zero_avx2;
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length_to_accel = 128;
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}
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#endif
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/* Array is sorted in order of algorithm preference. */
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static const struct {
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unsigned bit;
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unsigned len;
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bool (*fn)(const void *, size_t);
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} all[] = {
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#ifdef CONFIG_AVX512F_OPT
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if (cache & CACHE_AVX512F) {
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fn = buffer_zero_avx512;
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length_to_accel = 256;
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}
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{ CPUINFO_AVX512F, 256, buffer_zero_avx512 },
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#endif
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buffer_accel = fn;
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#ifdef CONFIG_AVX2_OPT
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{ CPUINFO_AVX2, 128, buffer_zero_avx2 },
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{ CPUINFO_SSE4, 64, buffer_zero_sse4 },
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#endif
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{ CPUINFO_SSE2, 64, buffer_zero_sse2 },
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{ CPUINFO_ALWAYS, 0, buffer_zero_int },
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};
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for (unsigned i = 0; i < ARRAY_SIZE(all); ++i) {
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if (info & all[i].bit) {
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length_to_accel = all[i].len;
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buffer_accel = all[i].fn;
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return all[i].bit;
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}
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}
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return 0;
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}
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#if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT)
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#include "qemu/cpuid.h"
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static void __attribute__((constructor)) init_cpuid_cache(void)
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static void __attribute__((constructor)) init_accel(void)
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{
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unsigned max = __get_cpuid_max(0, NULL);
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int a, b, c, d;
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unsigned cache = 0;
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if (max >= 1) {
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__cpuid(1, a, b, c, d);
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if (d & bit_SSE2) {
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cache |= CACHE_SSE2;
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}
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if (c & bit_SSE4_1) {
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cache |= CACHE_SSE4;
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}
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/* We must check that AVX is not just available, but usable. */
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if ((c & bit_OSXSAVE) && (c & bit_AVX) && max >= 7) {
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unsigned bv = xgetbv_low(0);
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__cpuid_count(7, 0, a, b, c, d);
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if ((bv & 0x6) == 0x6 && (b & bit_AVX2)) {
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cache |= CACHE_AVX2;
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}
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/* 0xe6:
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* XCR0[7:5] = 111b (OPMASK state, upper 256-bit of ZMM0-ZMM15
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* and ZMM16-ZMM31 state are enabled by OS)
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* XCR0[2:1] = 11b (XMM state and YMM state are enabled by OS)
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*/
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if ((bv & 0xe6) == 0xe6 && (b & bit_AVX512F)) {
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cache |= CACHE_AVX512F;
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}
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}
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}
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cpuid_cache = cache;
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init_accel(cache);
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used_accel = select_accel_cpuinfo(cpuinfo_init());
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}
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#endif /* CONFIG_AVX2_OPT */
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bool test_buffer_is_zero_next_accel(void)
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{
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/* If no bits set, we just tested buffer_zero_int, and there
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are no more acceleration options to test. */
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if (cpuid_cache == 0) {
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return false;
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}
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/* Disable the accelerator we used before and select a new one. */
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cpuid_cache &= cpuid_cache - 1;
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init_accel(cpuid_cache);
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return true;
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/*
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* Accumulate the accelerators that we've already tested, and
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* remove them from the set to test this round. We'll get back
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* a zero from select_accel_cpuinfo when there are no more.
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*/
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unsigned used = select_accel_cpuinfo(cpuinfo & ~used_accel);
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used_accel |= used;
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return used;
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}
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static bool select_accel_fn(const void *buf, size_t len)
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