From 51d9e939b8120d76feb096aeff04368683784541 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Fri, 7 Oct 2011 09:19:44 +0200 Subject: [PATCH] i8259: Update IRQ state after reset MIPS and PPC users of the i8259 output signal expect us to report state updates also after reset. As no consumer (including the master PIC) can misinterpret the deassert as an activation event, it is safe to simply update the IRQ state after reset. Signed-off-by: Jan Kiszka Signed-off-by: Blue Swirl --- hw/i8259.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/i8259.c b/hw/i8259.c index b7a011fb69..3498c6bf66 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -283,6 +283,7 @@ static void pic_reset(void *opaque) s->init4 = 0; s->single_mode = 0; /* Note: ELCR is not reset */ + pic_update_irq(s->pics_state); } static void pic_ioport_write(void *opaque, target_phys_addr_t addr64, @@ -298,8 +299,6 @@ static void pic_ioport_write(void *opaque, target_phys_addr_t addr64, if (val & 0x10) { /* init */ pic_reset(s); - /* deassert a pending interrupt */ - qemu_irq_lower(s->pics_state->pics[0].int_out); s->init_state = 1; s->init4 = val & 1; s->single_mode = val & 2;