mirror of https://github.com/xemu-project/xemu.git
target-arm: Add ARMCPU secure property
Added a "has_el3" state property to the ARMCPU descriptor. This property indicates whether the ARMCPU has security extensions enabled (EL3) or not. By default it is disabled at this time. Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1418684992-8996-10-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -100,6 +100,8 @@ typedef struct ARMCPU {
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bool start_powered_off;
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bool start_powered_off;
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/* CPU currently in PSCI powered-off state */
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/* CPU currently in PSCI powered-off state */
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bool powered_off;
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bool powered_off;
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/* CPU has security extension */
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bool has_el3;
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/* PSCI conduit used to invoke PSCI methods
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/* PSCI conduit used to invoke PSCI methods
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* 0 - disabled, 1 - smc, 2 - hvc
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* 0 - disabled, 1 - smc, 2 - hvc
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@ -388,6 +388,9 @@ static Property arm_cpu_reset_hivecs_property =
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static Property arm_cpu_rvbar_property =
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static Property arm_cpu_rvbar_property =
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DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);
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DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);
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static Property arm_cpu_has_el3_property =
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DEFINE_PROP_BOOL("has_el3", ARMCPU, has_el3, true);
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static void arm_cpu_post_init(Object *obj)
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static void arm_cpu_post_init(Object *obj)
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{
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{
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ARMCPU *cpu = ARM_CPU(obj);
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ARMCPU *cpu = ARM_CPU(obj);
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@ -407,6 +410,14 @@ static void arm_cpu_post_init(Object *obj)
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qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property,
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qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property,
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&error_abort);
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&error_abort);
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}
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}
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if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
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/* Add the has_el3 state CPU property only if EL3 is allowed. This will
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* prevent "has_el3" from existing on CPUs which cannot support EL3.
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*/
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qdev_property_add_static(DEVICE(obj), &arm_cpu_has_el3_property,
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&error_abort);
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}
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}
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}
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static void arm_cpu_finalizefn(Object *obj)
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static void arm_cpu_finalizefn(Object *obj)
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@ -476,6 +487,18 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
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cpu->reset_sctlr |= (1 << 13);
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cpu->reset_sctlr |= (1 << 13);
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}
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}
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if (!cpu->has_el3) {
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/* If the has_el3 CPU property is disabled then we need to disable the
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* feature.
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*/
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unset_feature(env, ARM_FEATURE_EL3);
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/* Disable the security extension feature bits in the processor feature
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* register as well. This is id_pfr1[7:4].
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*/
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cpu->id_pfr1 &= ~0xf0;
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}
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register_cp_regs_for_features(cpu);
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register_cp_regs_for_features(cpu);
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arm_cpu_register_gdb_regs_for_features(cpu);
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arm_cpu_register_gdb_regs_for_features(cpu);
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