mirror of https://github.com/xemu-project/xemu.git
target/alpha: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240129164514.73104-8-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
parent
348802b526
commit
50cb36ce77
|
@ -135,40 +135,27 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
|
|||
|
||||
static void ev4_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
env->implver = IMPLVER_2106x;
|
||||
cpu_env(CPU(obj))->implver = IMPLVER_2106x;
|
||||
}
|
||||
|
||||
static void ev5_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
env->implver = IMPLVER_21164;
|
||||
cpu_env(CPU(obj))->implver = IMPLVER_21164;
|
||||
}
|
||||
|
||||
static void ev56_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
env->amask |= AMASK_BWX;
|
||||
cpu_env(CPU(obj))->amask |= AMASK_BWX;
|
||||
}
|
||||
|
||||
static void pca56_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
env->amask |= AMASK_MVI;
|
||||
cpu_env(CPU(obj))->amask |= AMASK_MVI;
|
||||
}
|
||||
|
||||
static void ev6_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(CPU(obj));
|
||||
|
||||
env->implver = IMPLVER_21264;
|
||||
env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
|
||||
|
@ -176,16 +163,12 @@ static void ev6_cpu_initfn(Object *obj)
|
|||
|
||||
static void ev67_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
env->amask |= AMASK_CIX | AMASK_PREFETCH;
|
||||
cpu_env(CPU(obj))->amask |= AMASK_CIX | AMASK_PREFETCH;
|
||||
}
|
||||
|
||||
static void alpha_cpu_initfn(Object *obj)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(obj);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(CPU(obj));
|
||||
|
||||
env->lock_addr = -1;
|
||||
#if defined(CONFIG_USER_ONLY)
|
||||
|
|
|
@ -23,8 +23,7 @@
|
|||
|
||||
int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
uint64_t val;
|
||||
CPU_DoubleU d;
|
||||
|
||||
|
@ -59,8 +58,7 @@ int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
|
|||
|
||||
int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
target_ulong tmp = ldtul_p(mem_buf);
|
||||
CPU_DoubleU d;
|
||||
|
||||
|
|
|
@ -286,11 +286,10 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr,
|
|||
|
||||
hwaddr alpha_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
target_ulong phys;
|
||||
int prot, fail;
|
||||
|
||||
fail = get_physical_address(&cpu->env, addr, 0, 0, &phys, &prot);
|
||||
fail = get_physical_address(cpu_env(cs), addr, 0, 0, &phys, &prot);
|
||||
return (fail >= 0 ? -1 : phys);
|
||||
}
|
||||
|
||||
|
@ -298,8 +297,7 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
|
|||
MMUAccessType access_type, int mmu_idx,
|
||||
bool probe, uintptr_t retaddr)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
target_ulong phys;
|
||||
int prot, fail;
|
||||
|
||||
|
@ -325,8 +323,7 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
|
|||
|
||||
void alpha_cpu_do_interrupt(CPUState *cs)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
int i = cs->exception_index;
|
||||
|
||||
if (qemu_loglevel_mask(CPU_LOG_INT)) {
|
||||
|
@ -435,8 +432,7 @@ void alpha_cpu_do_interrupt(CPUState *cs)
|
|||
|
||||
bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
int idx = -1;
|
||||
|
||||
/* We never take interrupts while in PALmode. */
|
||||
|
@ -487,8 +483,7 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags)
|
|||
"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
|
||||
"t10", "t11", "ra", "t12", "at", "gp", "sp"
|
||||
};
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
int i;
|
||||
|
||||
qemu_fprintf(f, "PC " TARGET_FMT_lx " PS %02x\n",
|
||||
|
|
|
@ -42,18 +42,14 @@ static void do_unaligned_access(CPUAlphaState *env, vaddr addr, uintptr_t retadd
|
|||
void alpha_cpu_record_sigbus(CPUState *cs, vaddr addr,
|
||||
MMUAccessType access_type, uintptr_t retaddr)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
|
||||
do_unaligned_access(env, addr, retaddr);
|
||||
do_unaligned_access(cpu_env(cs), addr, retaddr);
|
||||
}
|
||||
#else
|
||||
void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
|
||||
MMUAccessType access_type,
|
||||
int mmu_idx, uintptr_t retaddr)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
|
||||
do_unaligned_access(env, addr, retaddr);
|
||||
cs->exception_index = EXCP_UNALIGN;
|
||||
|
@ -67,8 +63,7 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
|
|||
int mmu_idx, MemTxAttrs attrs,
|
||||
MemTxResult response, uintptr_t retaddr)
|
||||
{
|
||||
AlphaCPU *cpu = ALPHA_CPU(cs);
|
||||
CPUAlphaState *env = &cpu->env;
|
||||
CPUAlphaState *env = cpu_env(cs);
|
||||
|
||||
env->trap_arg0 = addr;
|
||||
env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
|
||||
|
|
|
@ -2903,8 +2903,8 @@ static void alpha_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
|
|||
static void alpha_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
|
||||
{
|
||||
DisasContext *ctx = container_of(dcbase, DisasContext, base);
|
||||
CPUAlphaState *env = cpu_env(cpu);
|
||||
uint32_t insn = translator_ldl(env, &ctx->base, ctx->base.pc_next);
|
||||
uint32_t insn = translator_ldl(cpu_env(cpu), &ctx->base,
|
||||
ctx->base.pc_next);
|
||||
|
||||
ctx->base.pc_next += 4;
|
||||
ctx->base.is_jmp = translate_one(ctx, insn);
|
||||
|
|
Loading…
Reference in New Issue