mirror of https://github.com/xemu-project/xemu.git
hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset
Convert the TYPE_ARM_SMMUV3 device to 3-phase reset. The legacy reset method doesn't do anything that's invalid in the hold phase, so the conversion only requires changing it to a hold phase method, and using the 3-phase versions of the "save the parent reset method and chain to it" code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221109161444.3397405-3-peter.maydell@linaro.org
This commit is contained in:
parent
3c1a7c4197
commit
503819a347
|
@ -1431,12 +1431,14 @@ static void smmu_init_irq(SMMUv3State *s, SysBusDevice *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void smmu_reset(DeviceState *dev)
|
static void smmu_reset_hold(Object *obj)
|
||||||
{
|
{
|
||||||
SMMUv3State *s = ARM_SMMUV3(dev);
|
SMMUv3State *s = ARM_SMMUV3(obj);
|
||||||
SMMUv3Class *c = ARM_SMMUV3_GET_CLASS(s);
|
SMMUv3Class *c = ARM_SMMUV3_GET_CLASS(s);
|
||||||
|
|
||||||
c->parent_reset(dev);
|
if (c->parent_phases.hold) {
|
||||||
|
c->parent_phases.hold(obj);
|
||||||
|
}
|
||||||
|
|
||||||
smmuv3_init_regs(s);
|
smmuv3_init_regs(s);
|
||||||
}
|
}
|
||||||
|
@ -1520,10 +1522,12 @@ static void smmuv3_instance_init(Object *obj)
|
||||||
static void smmuv3_class_init(ObjectClass *klass, void *data)
|
static void smmuv3_class_init(ObjectClass *klass, void *data)
|
||||||
{
|
{
|
||||||
DeviceClass *dc = DEVICE_CLASS(klass);
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||||
|
ResettableClass *rc = RESETTABLE_CLASS(klass);
|
||||||
SMMUv3Class *c = ARM_SMMUV3_CLASS(klass);
|
SMMUv3Class *c = ARM_SMMUV3_CLASS(klass);
|
||||||
|
|
||||||
dc->vmsd = &vmstate_smmuv3;
|
dc->vmsd = &vmstate_smmuv3;
|
||||||
device_class_set_parent_reset(dc, smmu_reset, &c->parent_reset);
|
resettable_class_set_parent_phases(rc, NULL, smmu_reset_hold, NULL,
|
||||||
|
&c->parent_phases);
|
||||||
c->parent_realize = dc->realize;
|
c->parent_realize = dc->realize;
|
||||||
dc->realize = smmu_realize;
|
dc->realize = smmu_realize;
|
||||||
}
|
}
|
||||||
|
|
|
@ -77,7 +77,7 @@ struct SMMUv3Class {
|
||||||
/*< public >*/
|
/*< public >*/
|
||||||
|
|
||||||
DeviceRealize parent_realize;
|
DeviceRealize parent_realize;
|
||||||
DeviceReset parent_reset;
|
ResettablePhases parent_phases;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define TYPE_ARM_SMMUV3 "arm-smmuv3"
|
#define TYPE_ARM_SMMUV3 "arm-smmuv3"
|
||||||
|
|
Loading…
Reference in New Issue