mirror of https://github.com/xemu-project/xemu.git
Softloat updates, mostly in preparation for s390x usage
-----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAlx1SJ4ACgkQ+9DbCVqe KkRLvgf/RyooKgC4+Gien26iuaEEaNJXcPmwPfzC18BiuxIV6GuWAIX3A5X8LRvJ HlRj32ervZUMPLk2Amttur9ijh8MCifTt7KyRIFWW1e97WCHX0BuD+DZgD8xT5yX zEL8z1MVdyh9ZeBQm930LbcwLeEwtV1jZHCNdlYNhFI4ZlZ8F4SmRdv8rfbAwz0d 1aC6rDSQhRaY6j5EurTZvDo4s1PA0fYa6LOkWSX/6rCWg1Z2Dtmb16ZTYscBFZ2P RhDILojQ6DSPvglcgCYzd/kCQD+OzE3TRSQc40MCS6gX8C4rfAkiuYpDFKNvzdnE aAkzemgiBBnslJ0m2VEmfGuJmvXbVg== =ApKt -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/stsquad/tags/pull-fpu-next-260219-1' into staging Softloat updates, mostly in preparation for s390x usage # gpg: Signature made Tue 26 Feb 2019 14:09:34 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-fpu-next-260219-1: tests/Makefile.include: test all rounding modes of softfloat softfloat: Support float_round_to_odd more places tests/fp: enable f128_to_ui[32/64] tests in float-to-uint tests/fp: add wrapping for f128_to_ui32 softfloat: Implement float128_to_uint32 softfloat: add float128_is_{normal,denormal} tests: Ignore fp test outputs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
4f9ca54d12
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@ -696,6 +696,7 @@ static FloatParts sf_canonicalize(FloatParts part, const FloatFmt *parm,
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static FloatParts round_canonical(FloatParts p, float_status *s,
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static FloatParts round_canonical(FloatParts p, float_status *s,
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const FloatFmt *parm)
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const FloatFmt *parm)
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{
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{
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const uint64_t frac_lsb = parm->frac_lsb;
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const uint64_t frac_lsbm1 = parm->frac_lsbm1;
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const uint64_t frac_lsbm1 = parm->frac_lsbm1;
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const uint64_t round_mask = parm->round_mask;
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const uint64_t round_mask = parm->round_mask;
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const uint64_t roundeven_mask = parm->roundeven_mask;
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const uint64_t roundeven_mask = parm->roundeven_mask;
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@ -731,6 +732,10 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
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inc = p.sign ? round_mask : 0;
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inc = p.sign ? round_mask : 0;
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overflow_norm = !p.sign;
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overflow_norm = !p.sign;
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break;
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break;
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case float_round_to_odd:
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overflow_norm = true;
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inc = frac & frac_lsb ? 0 : round_mask;
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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@ -778,9 +783,14 @@ static FloatParts round_canonical(FloatParts p, float_status *s,
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shift64RightJamming(frac, 1 - exp, &frac);
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shift64RightJamming(frac, 1 - exp, &frac);
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if (frac & round_mask) {
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if (frac & round_mask) {
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/* Need to recompute round-to-even. */
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/* Need to recompute round-to-even. */
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if (s->float_rounding_mode == float_round_nearest_even) {
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switch (s->float_rounding_mode) {
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case float_round_nearest_even:
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inc = ((frac & roundeven_mask) != frac_lsbm1
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inc = ((frac & roundeven_mask) != frac_lsbm1
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? frac_lsbm1 : 0);
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? frac_lsbm1 : 0);
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break;
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case float_round_to_odd:
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inc = frac & frac_lsb ? 0 : round_mask;
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break;
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}
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}
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flags |= float_flag_inexact;
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flags |= float_flag_inexact;
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frac += inc;
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frac += inc;
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@ -1988,6 +1998,9 @@ static FloatParts round_to_int(FloatParts a, int rmode,
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case float_round_down:
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case float_round_down:
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one = a.sign;
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one = a.sign;
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break;
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break;
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case float_round_to_odd:
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one = true;
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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@ -2021,6 +2034,9 @@ static FloatParts round_to_int(FloatParts a, int rmode,
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case float_round_down:
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case float_round_down:
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inc = a.sign ? rnd_mask : 0;
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inc = a.sign ? rnd_mask : 0;
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break;
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break;
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case float_round_to_odd:
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inc = a.frac & frac_lsb ? 0 : rnd_mask;
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break;
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default:
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default:
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g_assert_not_reached();
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g_assert_not_reached();
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}
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}
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@ -3314,6 +3330,9 @@ static int32_t roundAndPackInt32(flag zSign, uint64_t absZ, float_status *status
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case float_round_down:
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case float_round_down:
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roundIncrement = zSign ? 0x7f : 0;
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roundIncrement = zSign ? 0x7f : 0;
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break;
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break;
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case float_round_to_odd:
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roundIncrement = absZ & 0x80 ? 0 : 0x7f;
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break;
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default:
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default:
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abort();
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abort();
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}
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}
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@ -3368,6 +3387,9 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t absZ0, uint64_t absZ1,
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case float_round_down:
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case float_round_down:
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increment = zSign && absZ1;
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increment = zSign && absZ1;
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break;
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break;
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case float_round_to_odd:
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increment = !(absZ0 & 1) && absZ1;
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break;
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default:
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default:
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abort();
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abort();
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}
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}
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@ -3424,6 +3446,9 @@ static int64_t roundAndPackUint64(flag zSign, uint64_t absZ0,
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case float_round_down:
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case float_round_down:
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increment = zSign && absZ1;
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increment = zSign && absZ1;
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break;
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break;
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case float_round_to_odd:
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increment = !(absZ0 & 1) && absZ1;
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break;
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default:
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default:
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abort();
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abort();
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}
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}
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@ -3526,6 +3551,9 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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case float_round_down:
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case float_round_down:
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roundIncrement = zSign ? 0x7f : 0;
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roundIncrement = zSign ? 0x7f : 0;
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break;
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break;
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case float_round_to_odd:
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roundIncrement = zSig & 0x80 ? 0 : 0x7f;
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break;
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default:
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default:
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abort();
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abort();
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break;
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break;
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@ -3536,8 +3564,10 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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|| ( ( zExp == 0xFD )
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|| ( ( zExp == 0xFD )
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&& ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
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&& ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
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) {
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) {
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bool overflow_to_inf = roundingMode != float_round_to_odd &&
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roundIncrement != 0;
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float_raise(float_flag_overflow | float_flag_inexact, status);
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float_raise(float_flag_overflow | float_flag_inexact, status);
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return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
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return packFloat32(zSign, 0xFF, -!overflow_to_inf);
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}
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}
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if ( zExp < 0 ) {
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if ( zExp < 0 ) {
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if (status->flush_to_zero) {
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if (status->flush_to_zero) {
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@ -3555,6 +3585,13 @@ static float32 roundAndPackFloat32(flag zSign, int zExp, uint32_t zSig,
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if (isTiny && roundBits) {
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if (isTiny && roundBits) {
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float_raise(float_flag_underflow, status);
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float_raise(float_flag_underflow, status);
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}
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}
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if (roundingMode == float_round_to_odd) {
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/*
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* For round-to-odd case, the roundIncrement depends on
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* zSig which just changed.
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*/
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roundIncrement = zSig & 0x80 ? 0 : 0x7f;
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}
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}
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}
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}
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}
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if (roundBits) {
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if (roundBits) {
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@ -6792,6 +6829,35 @@ uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status)
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return res;
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return res;
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}
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}
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/*----------------------------------------------------------------------------
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| Returns the result of converting the quadruple-precision floating-point value
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| `a' to the 32-bit unsigned integer format. The conversion is
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| performed according to the IEC/IEEE Standard for Binary Floating-Point
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|
| Arithmetic---which means in particular that the conversion is rounded
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| according to the current rounding mode. If `a' is a NaN, the largest
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| positive integer is returned. If the conversion overflows, the
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| largest unsigned integer is returned. If 'a' is negative, the value is
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| rounded and zero is returned; negative values that do not round to zero
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| will raise the inexact exception.
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*----------------------------------------------------------------------------*/
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uint32_t float128_to_uint32(float128 a, float_status *status)
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{
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uint64_t v;
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uint32_t res;
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int old_exc_flags = get_float_exception_flags(status);
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v = float128_to_uint64(a, status);
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if (v > 0xffffffff) {
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res = 0xffffffff;
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} else {
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return v;
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}
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set_float_exception_flags(old_exc_flags, status);
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float_raise(float_flag_invalid, status);
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return res;
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}
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|
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/*----------------------------------------------------------------------------
|
/*----------------------------------------------------------------------------
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| Returns the result of converting the quadruple-precision floating-point
|
| Returns the result of converting the quadruple-precision floating-point
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| value `a' to the single-precision floating-point format. The conversion
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| value `a' to the single-precision floating-point format. The conversion
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@ -6958,6 +7024,15 @@ float128 float128_round_to_int(float128 a, float_status *status)
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add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
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add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
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}
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}
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break;
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break;
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case float_round_to_odd:
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/*
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|
* Note that if lastBitMask == 0, the last bit is the lsb
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* of high, and roundBitsMask == -1.
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*/
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if ((lastBitMask ? z.low & lastBitMask : z.high & 1) == 0) {
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add128(z.high, z.low, 0, roundBitsMask, &z.high, &z.low);
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}
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|
break;
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default:
|
default:
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abort();
|
abort();
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}
|
}
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|
@ -6969,7 +7044,7 @@ float128 float128_round_to_int(float128 a, float_status *status)
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status->float_exception_flags |= float_flag_inexact;
|
status->float_exception_flags |= float_flag_inexact;
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aSign = extractFloat128Sign( a );
|
aSign = extractFloat128Sign( a );
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switch (status->float_rounding_mode) {
|
switch (status->float_rounding_mode) {
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case float_round_nearest_even:
|
case float_round_nearest_even:
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if ( ( aExp == 0x3FFE )
|
if ( ( aExp == 0x3FFE )
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&& ( extractFloat128Frac0( a )
|
&& ( extractFloat128Frac0( a )
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| extractFloat128Frac1( a ) )
|
| extractFloat128Frac1( a ) )
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|
@ -6982,14 +7057,17 @@ float128 float128_round_to_int(float128 a, float_status *status)
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return packFloat128(aSign, 0x3FFF, 0, 0);
|
return packFloat128(aSign, 0x3FFF, 0, 0);
|
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}
|
}
|
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break;
|
break;
|
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case float_round_down:
|
case float_round_down:
|
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return
|
return
|
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aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
|
aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
|
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: packFloat128( 0, 0, 0, 0 );
|
: packFloat128( 0, 0, 0, 0 );
|
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case float_round_up:
|
case float_round_up:
|
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return
|
return
|
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aSign ? packFloat128( 1, 0, 0, 0 )
|
aSign ? packFloat128( 1, 0, 0, 0 )
|
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: packFloat128( 0, 0x3FFF, 0, 0 );
|
: packFloat128( 0, 0x3FFF, 0, 0 );
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|
|
||||||
|
case float_round_to_odd:
|
||||||
|
return packFloat128(aSign, 0x3FFF, 0, 0);
|
||||||
}
|
}
|
||||||
return packFloat128( aSign, 0, 0, 0 );
|
return packFloat128( aSign, 0, 0, 0 );
|
||||||
}
|
}
|
||||||
|
@ -7022,6 +7100,12 @@ float128 float128_round_to_int(float128 a, float_status *status)
|
||||||
z.high += roundBitsMask;
|
z.high += roundBitsMask;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case float_round_to_odd:
|
||||||
|
if ((z.high & lastBitMask) == 0) {
|
||||||
|
z.high |= (a.low != 0);
|
||||||
|
z.high += roundBitsMask;
|
||||||
|
}
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
abort();
|
abort();
|
||||||
}
|
}
|
||||||
|
|
|
@ -466,7 +466,7 @@ static inline int float32_is_zero_or_denormal(float32 a)
|
||||||
|
|
||||||
static inline bool float32_is_normal(float32 a)
|
static inline bool float32_is_normal(float32 a)
|
||||||
{
|
{
|
||||||
return ((float32_val(a) + 0x00800000) & 0x7fffffff) >= 0x01000000;
|
return (((float32_val(a) >> 23) + 1) & 0xff) >= 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline bool float32_is_denormal(float32 a)
|
static inline bool float32_is_denormal(float32 a)
|
||||||
|
@ -622,7 +622,7 @@ static inline int float64_is_zero_or_denormal(float64 a)
|
||||||
|
|
||||||
static inline bool float64_is_normal(float64 a)
|
static inline bool float64_is_normal(float64 a)
|
||||||
{
|
{
|
||||||
return ((float64_val(a) + (1ULL << 52)) & -1ULL >> 1) >= 1ULL << 53;
|
return (((float64_val(a) >> 52) + 1) & 0x7ff) >= 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline bool float64_is_denormal(float64 a)
|
static inline bool float64_is_denormal(float64 a)
|
||||||
|
@ -878,6 +878,7 @@ int64_t float128_to_int64(float128, float_status *status);
|
||||||
int64_t float128_to_int64_round_to_zero(float128, float_status *status);
|
int64_t float128_to_int64_round_to_zero(float128, float_status *status);
|
||||||
uint64_t float128_to_uint64(float128, float_status *status);
|
uint64_t float128_to_uint64(float128, float_status *status);
|
||||||
uint64_t float128_to_uint64_round_to_zero(float128, float_status *status);
|
uint64_t float128_to_uint64_round_to_zero(float128, float_status *status);
|
||||||
|
uint32_t float128_to_uint32(float128, float_status *status);
|
||||||
uint32_t float128_to_uint32_round_to_zero(float128, float_status *status);
|
uint32_t float128_to_uint32_round_to_zero(float128, float_status *status);
|
||||||
float32 float128_to_float32(float128, float_status *status);
|
float32 float128_to_float32(float128, float_status *status);
|
||||||
float64 float128_to_float64(float128, float_status *status);
|
float64 float128_to_float64(float128, float_status *status);
|
||||||
|
@ -940,6 +941,16 @@ static inline int float128_is_zero_or_denormal(float128 a)
|
||||||
return (a.high & 0x7fff000000000000LL) == 0;
|
return (a.high & 0x7fff000000000000LL) == 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline bool float128_is_normal(float128 a)
|
||||||
|
{
|
||||||
|
return (((a.high >> 48) + 1) & 0x7fff) >= 2;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline bool float128_is_denormal(float128 a)
|
||||||
|
{
|
||||||
|
return float128_is_zero_or_denormal(a) && !float128_is_zero(a);
|
||||||
|
}
|
||||||
|
|
||||||
static inline int float128_is_any_nan(float128 a)
|
static inline int float128_is_any_nan(float128 a)
|
||||||
{
|
{
|
||||||
return ((a.high >> 48) & 0x7fff) == 0x7fff &&
|
return ((a.high >> 48) & 0x7fff) == 0x7fff &&
|
||||||
|
|
|
@ -5,6 +5,7 @@ benchmark-crypto-hmac
|
||||||
check-*
|
check-*
|
||||||
!check-*.c
|
!check-*.c
|
||||||
!check-*.sh
|
!check-*.sh
|
||||||
|
fp/*.out
|
||||||
qht-bench
|
qht-bench
|
||||||
rcutorture
|
rcutorture
|
||||||
test-*
|
test-*
|
||||||
|
|
|
@ -916,19 +916,18 @@ $(FP_TEST_BIN):
|
||||||
# The full test suite can take a bit of time, default to a quick run
|
# The full test suite can take a bit of time, default to a quick run
|
||||||
# "-l 2 -r all" can take more than a day for some operations and is best
|
# "-l 2 -r all" can take more than a day for some operations and is best
|
||||||
# run manually
|
# run manually
|
||||||
FP_TL=-l 1
|
FP_TL=-l 1 -r all
|
||||||
|
|
||||||
# $1 = tests, $2 = description
|
# $1 = tests, $2 = description, $3 = test flags
|
||||||
test-softfloat = $(call quiet-command, \
|
test-softfloat = $(call quiet-command, \
|
||||||
cd $(BUILD_DIR)/tests/fp && \
|
cd $(BUILD_DIR)/tests/fp && \
|
||||||
./fp-test -s $(FP_TL) $1 > $2.out 2>&1 || \
|
./fp-test -s $(if $3,$3,$(FP_TL)) $1 > $2.out 2>&1 || \
|
||||||
(cat $2.out && exit 1;), \
|
(cat $2.out && exit 1;), \
|
||||||
"FLOAT TEST", $2)
|
"FLOAT TEST", $2)
|
||||||
|
|
||||||
# Conversion Routines:
|
# Conversion Routines:
|
||||||
# FIXME: i32_to_extF80 (broken), i64_to_extF80 (broken)
|
# FIXME: i32_to_extF80 (broken), i64_to_extF80 (broken)
|
||||||
# ui32_to_f128 (not implemented), f128_to_ui32 (not implemented)
|
# ui32_to_f128 (not implemented), extF80_roundToInt (broken)
|
||||||
# extF80_roundToInt (broken)
|
|
||||||
#
|
#
|
||||||
check-softfloat-conv: $(FP_TEST_BIN)
|
check-softfloat-conv: $(FP_TEST_BIN)
|
||||||
$(call test-softfloat, \
|
$(call test-softfloat, \
|
||||||
|
@ -957,9 +956,11 @@ check-softfloat-conv: $(FP_TEST_BIN)
|
||||||
f16_to_ui32 f16_to_ui32_r_minMag \
|
f16_to_ui32 f16_to_ui32_r_minMag \
|
||||||
f32_to_ui32 f32_to_ui32_r_minMag \
|
f32_to_ui32 f32_to_ui32_r_minMag \
|
||||||
f64_to_ui32 f64_to_ui32_r_minMag \
|
f64_to_ui32 f64_to_ui32_r_minMag \
|
||||||
|
f128_to_ui32 f128_to_ui32_r_minMag \
|
||||||
f16_to_ui64 f16_to_ui64_r_minMag \
|
f16_to_ui64 f16_to_ui64_r_minMag \
|
||||||
f32_to_ui64 f32_to_ui64_r_minMag \
|
f32_to_ui64 f32_to_ui64_r_minMag \
|
||||||
f64_to_ui64 f64_to_ui64_r_minMag, \
|
f64_to_ui64 f64_to_ui64_r_minMag \
|
||||||
|
f128_to_ui64 f128_to_ui64_r_minMag, \
|
||||||
float-to-uint)
|
float-to-uint)
|
||||||
$(call test-softfloat, \
|
$(call test-softfloat, \
|
||||||
f16_roundToInt f32_roundToInt \
|
f16_roundToInt f32_roundToInt \
|
||||||
|
@ -1001,7 +1002,7 @@ check-softfloat-compare: $(SF_COMPARE_RULES)
|
||||||
check-softfloat-mulAdd: $(FP_TEST_BIN)
|
check-softfloat-mulAdd: $(FP_TEST_BIN)
|
||||||
$(call test-softfloat, \
|
$(call test-softfloat, \
|
||||||
f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd, \
|
f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd, \
|
||||||
mulAdd)
|
mulAdd,-l 1)
|
||||||
|
|
||||||
# FIXME: extF80_rem (broken)
|
# FIXME: extF80_rem (broken)
|
||||||
check-softfloat-rem: $(FP_TEST_BIN)
|
check-softfloat-rem: $(FP_TEST_BIN)
|
||||||
|
|
|
@ -125,17 +125,42 @@ static void not_implemented(void)
|
||||||
|
|
||||||
static bool blacklisted(unsigned op, int rmode)
|
static bool blacklisted(unsigned op, int rmode)
|
||||||
{
|
{
|
||||||
/* odd has only been implemented for a few 128-bit ops */
|
/* odd has not been implemented for any 80-bit ops */
|
||||||
if (rmode == softfloat_round_odd) {
|
if (rmode == softfloat_round_odd) {
|
||||||
switch (op) {
|
switch (op) {
|
||||||
case F128_ADD:
|
case EXTF80_TO_UI32:
|
||||||
case F128_SUB:
|
case EXTF80_TO_UI64:
|
||||||
case F128_MUL:
|
case EXTF80_TO_I32:
|
||||||
case F128_DIV:
|
case EXTF80_TO_I64:
|
||||||
case F128_TO_F64:
|
case EXTF80_TO_UI32_R_MINMAG:
|
||||||
case F128_SQRT:
|
case EXTF80_TO_UI64_R_MINMAG:
|
||||||
return false;
|
case EXTF80_TO_I32_R_MINMAG:
|
||||||
default:
|
case EXTF80_TO_I64_R_MINMAG:
|
||||||
|
case EXTF80_TO_F16:
|
||||||
|
case EXTF80_TO_F32:
|
||||||
|
case EXTF80_TO_F64:
|
||||||
|
case EXTF80_TO_F128:
|
||||||
|
case EXTF80_ROUNDTOINT:
|
||||||
|
case EXTF80_ADD:
|
||||||
|
case EXTF80_SUB:
|
||||||
|
case EXTF80_MUL:
|
||||||
|
case EXTF80_DIV:
|
||||||
|
case EXTF80_REM:
|
||||||
|
case EXTF80_SQRT:
|
||||||
|
case EXTF80_EQ:
|
||||||
|
case EXTF80_LE:
|
||||||
|
case EXTF80_LT:
|
||||||
|
case EXTF80_EQ_SIGNALING:
|
||||||
|
case EXTF80_LE_QUIET:
|
||||||
|
case EXTF80_LT_QUIET:
|
||||||
|
case UI32_TO_EXTF80:
|
||||||
|
case UI64_TO_EXTF80:
|
||||||
|
case I32_TO_EXTF80:
|
||||||
|
case I64_TO_EXTF80:
|
||||||
|
case F16_TO_EXTF80:
|
||||||
|
case F32_TO_EXTF80:
|
||||||
|
case F64_TO_EXTF80:
|
||||||
|
case F128_TO_EXTF80:
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -622,7 +647,8 @@ static void do_testfloat(int op, int rmode, bool exact)
|
||||||
test_ab_extF80_z_bool(true_ab_extF80M_z_bool, subj_ab_extF80M_z_bool);
|
test_ab_extF80_z_bool(true_ab_extF80M_z_bool, subj_ab_extF80M_z_bool);
|
||||||
break;
|
break;
|
||||||
case F128_TO_UI32:
|
case F128_TO_UI32:
|
||||||
not_implemented();
|
test_a_f128_z_ui32_rx(slow_f128M_to_ui32, qemu_f128M_to_ui32, rmode,
|
||||||
|
exact);
|
||||||
break;
|
break;
|
||||||
case F128_TO_UI64:
|
case F128_TO_UI64:
|
||||||
test_a_f128_z_ui64_rx(slow_f128M_to_ui64, qemu_f128M_to_ui64, rmode,
|
test_a_f128_z_ui64_rx(slow_f128M_to_ui64, qemu_f128M_to_ui64, rmode,
|
||||||
|
|
|
@ -367,6 +367,7 @@ WRAP_80_TO_INT_MINMAG(qemu_extF80M_to_i64_r_minMag,
|
||||||
WRAP_128_TO_INT(qemu_f128M_to_i32, float128_to_int32, int_fast32_t)
|
WRAP_128_TO_INT(qemu_f128M_to_i32, float128_to_int32, int_fast32_t)
|
||||||
WRAP_128_TO_INT(qemu_f128M_to_i64, float128_to_int64, int_fast64_t)
|
WRAP_128_TO_INT(qemu_f128M_to_i64, float128_to_int64, int_fast64_t)
|
||||||
|
|
||||||
|
WRAP_128_TO_INT(qemu_f128M_to_ui32, float128_to_uint32, uint_fast32_t)
|
||||||
WRAP_128_TO_INT(qemu_f128M_to_ui64, float128_to_uint64, uint_fast64_t)
|
WRAP_128_TO_INT(qemu_f128M_to_ui64, float128_to_uint64, uint_fast64_t)
|
||||||
#undef WRAP_128_TO_INT
|
#undef WRAP_128_TO_INT
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue