ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

sifive_u: Fix crash when introspecting the device 

Use the new object_initialize_child() and sysbus_init_child_obj() to
fix the issue.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Alistair Francis 2018-07-16 15:30:32 -07:00
parent 54f3141a58
commit 4eea9d7deb
1 changed files with 7 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
hw/riscv/sifive_u.c
View File

@ -244,9 +244,9 @@ static void riscv_sifive_u_init(MachineState *machine)
int i;
/* Initialize SoC */
object_initialize(&s->soc, sizeof(s->soc), TYPE_RISCV_U_SOC);
object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
&error_abort);
object_initialize_child(OBJECT(machine), "soc", &s->soc,
sizeof(s->soc), TYPE_RISCV_U_SOC,
&error_abort, NULL);
object_property_set_bool(OBJECT(&s->soc), true, "realized",
&error_abort);
@ -303,16 +303,15 @@ static void riscv_sifive_u_soc_init(Object *obj)
{
SiFiveUSoCState *s = RISCV_U_SOC(obj);
object_initialize(&s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY);
object_property_add_child(obj, "cpus", OBJECT(&s->cpus),
&error_abort);
object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus),
TYPE_RISCV_HART_ARRAY, &error_abort, NULL);
object_property_set_str(OBJECT(&s->cpus), SIFIVE_U_CPU, "cpu-type",
&error_abort);
object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts",
&error_abort);
object_initialize(&s->gem, sizeof(s->gem), TYPE_CADENCE_GEM);
qdev_set_parent_bus(DEVICE(&s->gem), sysbus_get_default());
sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
TYPE_CADENCE_GEM);
}
static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)