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ioapic: Convert to memory API 

This maintains the old imprecise access size handling.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Jan Kiszka 2011-10-17 13:11:27 +02:00 committed by Avi Kivity
parent 1a440963b9
commit 4d5bf5f651
1 changed files with 11 additions and 17 deletions
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28
hw/ioapic.c
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@ -86,6 +86,7 @@ typedef struct IOAPICState IOAPICState;
struct IOAPICState { struct IOAPICState {
SysBusDevice busdev; SysBusDevice busdev;
MemoryRegion io_memory;
uint8_t id; uint8_t id;
uint8_t ioregsel; uint8_t ioregsel;
uint32_t irr; uint32_t irr;
@ -195,7 +196,8 @@ void ioapic_eoi_broadcast(int vector)
} }
} }
static uint32_t ioapic_mem_readl(void *opaque, target_phys_addr_t addr) static uint64_t
ioapic_mem_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{ {
IOAPICState *s = opaque; IOAPICState *s = opaque;
int index; int index;
@ -237,7 +239,8 @@ static uint32_t ioapic_mem_readl(void *opaque, target_phys_addr_t addr)
} }
static void static void
ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) ioapic_mem_write(void *opaque, target_phys_addr_t addr, uint64_t val,
unsigned int size)
{ {
IOAPICState *s = opaque; IOAPICState *s = opaque;
int index; int index;
@ -315,32 +318,23 @@ static void ioapic_reset(DeviceState *d)
} }
} }
static CPUReadMemoryFunc * const ioapic_mem_read[3] = { static const MemoryRegionOps ioapic_io_ops = {
ioapic_mem_readl, .read = ioapic_mem_read,
ioapic_mem_readl, .write = ioapic_mem_write,
ioapic_mem_readl, .endianness = DEVICE_NATIVE_ENDIAN,
};
static CPUWriteMemoryFunc * const ioapic_mem_write[3] = {
ioapic_mem_writel,
ioapic_mem_writel,
ioapic_mem_writel,
}; };
static int ioapic_init1(SysBusDevice *dev) static int ioapic_init1(SysBusDevice *dev)
{ {
IOAPICState *s = FROM_SYSBUS(IOAPICState, dev); IOAPICState *s = FROM_SYSBUS(IOAPICState, dev);
int io_memory;
static int ioapic_no; static int ioapic_no;
if (ioapic_no >= MAX_IOAPICS) { if (ioapic_no >= MAX_IOAPICS) {
return -1; return -1;
} }
io_memory = cpu_register_io_memory(ioapic_mem_read, memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000);
ioapic_mem_write, s, sysbus_init_mmio_region(dev, &s->io_memory);
DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, 0x1000, io_memory);
qdev_init_gpio_in(&dev->qdev, ioapic_set_irq, IOAPIC_NUM_PINS); qdev_init_gpio_in(&dev->qdev, ioapic_set_irq, IOAPIC_NUM_PINS);