mirror of https://github.com/xemu-project/xemu.git
tests/tcg/xtensa: fix vectors and checks in timer test
Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -38,6 +38,28 @@ test_end
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#if XCHAL_NUM_TIMERS
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#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
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#define TIMER0_VECTOR kernel
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#else
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#define TIMER0_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT))
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#endif
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#if XCHAL_NUM_TIMERS > 1
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#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
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#define TIMER1_VECTOR kernel
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#else
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#define TIMER1_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT))
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#endif
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#endif
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#if XCHAL_NUM_TIMERS > 2
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#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
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#define TIMER2_VECTOR kernel
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#else
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#define TIMER2_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT))
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#endif
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#endif
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test ccount_update_deadline
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movi a2, 0
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wsr a2, intenable
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@ -90,9 +112,8 @@ test ccompare
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assert nei, a5, 0
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test_end
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#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
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test ccompare0_interrupt
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set_vector kernel, 2f
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set_vector TIMER0_VECTOR, 2f
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movi a2, 0
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wsr a2, intenable
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rsr a2, interrupt
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@ -120,15 +141,16 @@ test ccompare0_interrupt
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bnez a3, 1b
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test_fail
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2:
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#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
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rsr a2, exccause
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assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
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test_end
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#endif
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test_end
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#if XCHAL_NUM_TIMERS > 1
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test ccompare1_interrupt
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set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT)), 2f
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set_vector TIMER1_VECTOR, 2f
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movi a2, 0
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wsr a2, intenable
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rsr a2, interrupt
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@ -153,13 +175,17 @@ test ccompare1_interrupt
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bnez a3, 1b
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test_fail
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2:
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#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
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rsr a2, exccause
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assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
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#endif
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test_end
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#endif
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#if XCHAL_NUM_TIMERS > 2
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test ccompare2_interrupt
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set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT)), 2f
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set_vector TIMER2_VECTOR, 2f
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movi a2, 0
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wsr a2, intenable
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rsr a2, interrupt
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@ -182,12 +208,16 @@ test ccompare2_interrupt
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bnez a3, 1b
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test_fail
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2:
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#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
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rsr a2, exccause
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assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
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#endif
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test_end
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#endif
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test ccompare_interrupt_masked
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set_vector kernel, 2f
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set_vector TIMER0_VECTOR, 2f
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movi a2, 0
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wsr a2, intenable
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rsr a2, interrupt
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@ -217,12 +247,14 @@ test ccompare_interrupt_masked
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test_fail
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2:
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#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
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rsr a2, exccause
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assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
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#endif
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test_end
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test ccompare_interrupt_masked_waiti
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set_vector kernel, 2f
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set_vector TIMER0_VECTOR, 2f
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movi a2, 0
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wsr a2, intenable
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rsr a2, interrupt
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@ -247,8 +279,10 @@ test ccompare_interrupt_masked_waiti
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waiti 0
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test_fail
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2:
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#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
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rsr a2, exccause
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assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */
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#endif
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test_end
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#endif
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