mirror of https://github.com/xemu-project/xemu.git
target/arm: Fix unaligned checks for mte_check1, mte_probe1
We were incorrectly assuming that only the first byte of an MTE access is checked against the tags. But per the ARM, unaligned accesses are pre-decomposed into single-byte accesses. So by the time we reach the actual MTE check in the ARM pseudocode, all accesses are aligned. We cannot tell a priori whether or not a given scalar access is aligned, therefore we must at least check. Use mte_probe_int, which is already set up for checking multiple granules. Buglink: https://bugs.launchpad.net/bugs/1921948 Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210416183106.1516563-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -617,80 +617,6 @@ static void mte_check_fail(CPUARMState *env, uint32_t desc,
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}
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}
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/*
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* Perform an MTE checked access for a single logical or atomic access.
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*/
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static bool mte_probe1_int(CPUARMState *env, uint32_t desc, uint64_t ptr,
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uintptr_t ra, int bit55)
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{
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int mem_tag, mmu_idx, ptr_tag, size;
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MMUAccessType type;
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uint8_t *mem;
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ptr_tag = allocation_tag_from_addr(ptr);
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if (tcma_check(desc, bit55, ptr_tag)) {
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return true;
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}
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mmu_idx = FIELD_EX32(desc, MTEDESC, MIDX);
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type = FIELD_EX32(desc, MTEDESC, WRITE) ? MMU_DATA_STORE : MMU_DATA_LOAD;
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size = FIELD_EX32(desc, MTEDESC, ESIZE);
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mem = allocation_tag_mem(env, mmu_idx, ptr, type, size,
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MMU_DATA_LOAD, 1, ra);
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if (!mem) {
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return true;
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}
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mem_tag = load_tag1(ptr, mem);
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return ptr_tag == mem_tag;
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}
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/*
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* No-fault version of mte_check1, to be used by SVE for MemSingleNF.
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* Returns false if the access is Checked and the check failed. This
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* is only intended to probe the tag -- the validity of the page must
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* be checked beforehand.
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*/
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bool mte_probe1(CPUARMState *env, uint32_t desc, uint64_t ptr)
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{
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int bit55 = extract64(ptr, 55, 1);
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/* If TBI is disabled, the access is unchecked. */
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if (unlikely(!tbi_check(desc, bit55))) {
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return true;
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}
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return mte_probe1_int(env, desc, ptr, 0, bit55);
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}
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uint64_t mte_check1(CPUARMState *env, uint32_t desc,
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uint64_t ptr, uintptr_t ra)
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{
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int bit55 = extract64(ptr, 55, 1);
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/* If TBI is disabled, the access is unchecked, and ptr is not dirty. */
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if (unlikely(!tbi_check(desc, bit55))) {
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return ptr;
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}
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if (unlikely(!mte_probe1_int(env, desc, ptr, ra, bit55))) {
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mte_check_fail(env, desc, ptr, ra);
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}
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return useronly_clean_ptr(ptr);
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}
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uint64_t HELPER(mte_check1)(CPUARMState *env, uint32_t desc, uint64_t ptr)
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{
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return mte_check1(env, desc, ptr, GETPC());
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}
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/*
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* Perform an MTE checked access for multiple logical accesses.
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*/
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/**
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* checkN:
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* @tag: tag memory to test
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@ -882,6 +808,41 @@ uint64_t HELPER(mte_checkN)(CPUARMState *env, uint32_t desc, uint64_t ptr)
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return mte_checkN(env, desc, ptr, GETPC());
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}
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uint64_t mte_check1(CPUARMState *env, uint32_t desc,
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uint64_t ptr, uintptr_t ra)
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{
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uint64_t fault;
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uint32_t total = FIELD_EX32(desc, MTEDESC, ESIZE);
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int ret = mte_probe_int(env, desc, ptr, ra, total, &fault);
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if (unlikely(ret == 0)) {
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mte_check_fail(env, desc, fault, ra);
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} else if (ret < 0) {
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return ptr;
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}
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return useronly_clean_ptr(ptr);
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}
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uint64_t HELPER(mte_check1)(CPUARMState *env, uint32_t desc, uint64_t ptr)
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{
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return mte_check1(env, desc, ptr, GETPC());
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}
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/*
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* No-fault version of mte_check1, to be used by SVE for MemSingleNF.
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* Returns false if the access is Checked and the check failed. This
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* is only intended to probe the tag -- the validity of the page must
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* be checked beforehand.
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*/
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bool mte_probe1(CPUARMState *env, uint32_t desc, uint64_t ptr)
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{
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uint64_t fault;
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uint32_t total = FIELD_EX32(desc, MTEDESC, ESIZE);
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int ret = mte_probe_int(env, desc, ptr, 0, total, &fault);
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return ret != 0;
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}
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/*
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* Perform an MTE checked access for DC_ZVA.
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*/
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