mirror of https://github.com/xemu-project/xemu.git
target/ppc: Implement slbiag
Reviewed-by: Leandro Lupori <leandro.lupori@eldorado.org.br> Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br> Message-Id: <20220701133507.740619-12-lucas.coutinho@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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@ -681,6 +681,7 @@ DEF_HELPER_2(SLBMFEE, tl, env, tl)
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DEF_HELPER_2(SLBMFEV, tl, env, tl)
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DEF_HELPER_2(SLBFEE, tl, env, tl)
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DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32)
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DEF_HELPER_FLAGS_3(SLBIAG, TCG_CALL_NO_RWG, void, env, tl, i32)
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DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(SLBIEG, TCG_CALL_NO_RWG, void, env, tl)
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#endif
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@ -152,6 +152,9 @@
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&X_rb rb
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@X_rb ...... ..... ..... rb:5 .......... . &X_rb
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&X_rs_l rs l:bool
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@X_rs_l ...... rs:5 .... l:1 ..... .......... . &X_rs_l
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&X_uim5 xt uim:uint8_t
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@X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt
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@ -869,6 +872,7 @@ SLBIE 011111 ----- ----- ..... 0110110010 - @X_rb
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SLBIEG 011111 ..... ----- ..... 0111010010 - @X_tb
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SLBIA 011111 --... ----- ----- 0111110010 - @X_ih
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SLBIAG 011111 ..... ----. ----- 1101010010 - @X_rs_l
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SLBMTE 011111 ..... ----- ..... 0110010010 - @X_tb
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@ -173,6 +173,33 @@ void helper_SLBIA(CPUPPCState *env, uint32_t ih)
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}
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}
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#if defined(TARGET_PPC64)
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void helper_SLBIAG(CPUPPCState *env, target_ulong rs, uint32_t l)
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{
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PowerPCCPU *cpu = env_archcpu(env);
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int n;
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/*
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* slbiag must always flush all TLB (which is equivalent to ERAT in ppc
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* architecture). Matching on SLB_ESID_V is not good enough, because slbmte
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* can overwrite a valid SLB without flushing its lookaside information.
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*
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* It would be possible to keep the TLB in synch with the SLB by flushing
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* when a valid entry is overwritten by slbmte, and therefore slbiag would
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* not have to flush unless it evicts a valid SLB entry. However it is
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* expected that slbmte is more common than slbiag, and slbiag is usually
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* going to evict valid SLB entries, so that tradeoff is unlikely to be a
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* good one.
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*/
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env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH;
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for (n = 0; n < cpu->hash64_opts->slb_size; n++) {
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ppc_slb_t *slb = &env->slb[n];
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slb->esid &= ~SLB_ESID_V;
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}
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}
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#endif
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static void __helper_slbie(CPUPPCState *env, target_ulong addr,
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target_ulong global)
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{
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@ -65,6 +65,20 @@ static bool trans_SLBIA(DisasContext *ctx, arg_SLBIA *a)
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return true;
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}
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static bool trans_SLBIAG(DisasContext *ctx, arg_SLBIAG *a)
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{
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REQUIRE_64BIT(ctx);
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REQUIRE_INSNS_FLAGS2(ctx, ISA300);
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REQUIRE_SV(ctx);
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#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64)
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gen_helper_SLBIAG(cpu_env, cpu_gpr[a->rs], tcg_constant_i32(a->l));
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#else
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qemu_build_not_reached();
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#endif
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return true;
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}
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static bool trans_SLBMTE(DisasContext *ctx, arg_SLBMTE *a)
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{
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REQUIRE_64BIT(ctx);
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