From 4919f69c658be36c97d63660bd41377b06ea6822 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <f4bug@amsat.org>
Date: Sat, 31 Jul 2021 15:23:47 +0200
Subject: [PATCH] target/mips: Decode vendor extensions before MIPS ISAs
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In commit ffc672aa977 ("target/mips/tx79: Move MFHI1 / MFLO1
opcodes to decodetree") we misplaced the decoder call. Move
it to the correct place.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210801234202.3167676-3-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/translate.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 6b95cca052..490add3fc1 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -16094,6 +16094,11 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
/* Transition to the auto-generated decoder. */
+ /* Vendor specific extensions */
+ if (cpu_supports_isa(env, INSN_R5900) && decode_ext_txx9(ctx, ctx->opcode)) {
+ return;
+ }
+
/* ISA extensions */
if (ase_msa_available(env) && decode_ase_msa(ctx, ctx->opcode)) {
return;
@@ -16103,9 +16108,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
if (cpu_supports_isa(env, ISA_MIPS_R6) && decode_isa_rel6(ctx, ctx->opcode)) {
return;
}
- if (cpu_supports_isa(env, INSN_R5900) && decode_ext_txx9(ctx, ctx->opcode)) {
- return;
- }
if (decode_opc_legacy(env, ctx)) {
return;