mirror of https://github.com/xemu-project/xemu.git
e1000e: Prevent MSI/MSI-X storms
Only signal MSI/MSI-X events on rising edges. So far we re-triggered the interrupt sources even if the guest did no consumed the pending one, easily causing interrupt storms. Issue was observable with Linux 4.16 e1000e driver when MSI-X was used. Vector 2 was causing interrupt storms after the driver activated the device. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
This commit is contained in:
parent
9f2b67e1ca
commit
4712c158c5
|
@ -2023,6 +2023,7 @@ e1000e_msix_notify_one(E1000ECore *core, uint32_t cause, uint32_t int_cfg)
|
||||||
effective_eiac = core->mac[EIAC] & cause;
|
effective_eiac = core->mac[EIAC] & cause;
|
||||||
|
|
||||||
core->mac[ICR] &= ~effective_eiac;
|
core->mac[ICR] &= ~effective_eiac;
|
||||||
|
core->msi_causes_pending &= ~effective_eiac;
|
||||||
|
|
||||||
if (!(core->mac[CTRL_EXT] & E1000_CTRL_EXT_IAME)) {
|
if (!(core->mac[CTRL_EXT] & E1000_CTRL_EXT_IAME)) {
|
||||||
core->mac[IMS] &= ~effective_eiac;
|
core->mac[IMS] &= ~effective_eiac;
|
||||||
|
@ -2119,6 +2120,13 @@ e1000e_send_msi(E1000ECore *core, bool msix)
|
||||||
{
|
{
|
||||||
uint32_t causes = core->mac[ICR] & core->mac[IMS] & ~E1000_ICR_ASSERTED;
|
uint32_t causes = core->mac[ICR] & core->mac[IMS] & ~E1000_ICR_ASSERTED;
|
||||||
|
|
||||||
|
core->msi_causes_pending &= causes;
|
||||||
|
causes ^= core->msi_causes_pending;
|
||||||
|
if (causes == 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
core->msi_causes_pending |= causes;
|
||||||
|
|
||||||
if (msix) {
|
if (msix) {
|
||||||
e1000e_msix_notify(core, causes);
|
e1000e_msix_notify(core, causes);
|
||||||
} else {
|
} else {
|
||||||
|
@ -2156,6 +2164,9 @@ e1000e_update_interrupt_state(E1000ECore *core)
|
||||||
core->mac[ICS] = core->mac[ICR];
|
core->mac[ICS] = core->mac[ICR];
|
||||||
|
|
||||||
interrupts_pending = (core->mac[IMS] & core->mac[ICR]) ? true : false;
|
interrupts_pending = (core->mac[IMS] & core->mac[ICR]) ? true : false;
|
||||||
|
if (!interrupts_pending) {
|
||||||
|
core->msi_causes_pending = 0;
|
||||||
|
}
|
||||||
|
|
||||||
trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS],
|
trace_e1000e_irq_pending_interrupts(core->mac[ICR] & core->mac[IMS],
|
||||||
core->mac[ICR], core->mac[IMS]);
|
core->mac[ICR], core->mac[IMS]);
|
||||||
|
|
|
@ -109,6 +109,8 @@ struct E1000Core {
|
||||||
NICState *owner_nic;
|
NICState *owner_nic;
|
||||||
PCIDevice *owner;
|
PCIDevice *owner;
|
||||||
void (*owner_start_recv)(PCIDevice *d);
|
void (*owner_start_recv)(PCIDevice *d);
|
||||||
|
|
||||||
|
uint32_t msi_causes_pending;
|
||||||
};
|
};
|
||||||
|
|
||||||
void
|
void
|
||||||
|
|
Loading…
Reference in New Issue