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target/avr: Add instruction translation - MCU Control Instructions 

This includes:
    - BREAK
    - NOP
    - SLEEP
    - WDR

Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-16-huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Michael Rolnik 2020-01-24 01:51:14 +01:00 committed by Philippe Mathieu-Daudé
parent 5718cef05a
commit 46188cabae
2 changed files with 73 additions and 0 deletions
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8
target/avr/insn.decode
View File

@ -177,3 +177,11 @@ BST 1111 101 rd:5 0 bit:3
BLD 1111 100 rd:5 0 bit:3
BSET 1001 0100 0 bit:3 1000
BCLR 1001 0100 1 bit:3 1000
#
# MCU Control Instructions
#
BREAK 1001 0101 1001 1000
NOP 0000 0000 0000 0000
SLEEP 1001 0101 1000 1000
WDR 1001 0101 1010 1000

65
target/avr/translate.c
View File

@ -2740,3 +2740,68 @@ static bool trans_BCLR(DisasContext *ctx, arg_BCLR *a)
return true;
}
/*
* MCU Control Instructions
*/
/*
* The BREAK instruction is used by the On-chip Debug system, and is
* normally not used in the application software. When the BREAK instruction is
* executed, the AVR CPU is set in the Stopped Mode. This gives the On-chip
* Debugger access to internal resources. If any Lock bits are set, or either
* the JTAGEN or OCDEN Fuses are unprogrammed, the CPU will treat the BREAK
* instruction as a NOP and will not enter the Stopped mode. This instruction
* is not available in all devices. Refer to the device specific instruction
* set summary.
*/
static bool trans_BREAK(DisasContext *ctx, arg_BREAK *a)
{
if (!avr_have_feature(ctx, AVR_FEATURE_BREAK)) {
return true;
}
#ifdef BREAKPOINT_ON_BREAK
tcg_gen_movi_tl(cpu_pc, ctx->npc - 1);
gen_helper_debug(cpu_env);
ctx->bstate = DISAS_EXIT;
#else
/* NOP */
#endif
return true;
}
/*
* This instruction performs a single cycle No Operation.
*/
static bool trans_NOP(DisasContext *ctx, arg_NOP *a)
{
/* NOP */
return true;
}
/*
* This instruction sets the circuit in sleep mode defined by the MCU
* Control Register.
*/
static bool trans_SLEEP(DisasContext *ctx, arg_SLEEP *a)
{
gen_helper_sleep(cpu_env);
ctx->bstate = DISAS_NORETURN;
return true;
}
/*
* This instruction resets the Watchdog Timer. This instruction must be
* executed within a limited time given by the WD prescaler. See the Watchdog
* Timer hardware specification.
*/
static bool trans_WDR(DisasContext *ctx, arg_WDR *a)
{
gen_helper_wdr(cpu_env);
return true;
}