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target/arm: Use tcg_constant in WHILE 

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-42-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-26 09:30:37 -07:00 committed by Peter Maydell
parent 053552d367
commit 4481bbf25e
1 changed files with 7 additions and 13 deletions
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20
target/arm/translate-sve.c
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@ -3568,7 +3568,7 @@ static bool trans_CTERM(DisasContext *s, arg_CTERM *a)
static bool trans_WHILE(DisasContext *s, arg_WHILE *a) static bool trans_WHILE(DisasContext *s, arg_WHILE *a)
{ {
TCGv_i64 op0, op1, t0, t1, tmax; TCGv_i64 op0, op1, t0, t1, tmax;
TCGv_i32 t2, t3; TCGv_i32 t2;
TCGv_ptr ptr; TCGv_ptr ptr;
unsigned vsz = vec_full_reg_size(s); unsigned vsz = vec_full_reg_size(s);
unsigned desc = 0; unsigned desc = 0;
@ -3624,7 +3624,7 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a)
} }
} }
tmax = tcg_const_i64(vsz >> a->esz); tmax = tcg_constant_i64(vsz >> a->esz);
if (eq) { if (eq) {
/* Equality means one more iteration. */ /* Equality means one more iteration. */
tcg_gen_addi_i64(t0, t0, 1); tcg_gen_addi_i64(t0, t0, 1);
@ -3644,7 +3644,6 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a)
/* Bound to the maximum. */ /* Bound to the maximum. */
tcg_gen_umin_i64(t0, t0, tmax); tcg_gen_umin_i64(t0, t0, tmax);
tcg_temp_free_i64(tmax);
/* Set the count to zero if the condition is false. */ /* Set the count to zero if the condition is false. */
tcg_gen_movi_i64(t1, 0); tcg_gen_movi_i64(t1, 0);
@ -3661,28 +3660,26 @@ static bool trans_WHILE(DisasContext *s, arg_WHILE *a)
desc = FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8); desc = FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8);
desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz); desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
t3 = tcg_const_i32(desc);
ptr = tcg_temp_new_ptr(); ptr = tcg_temp_new_ptr();
tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd)); tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd));
if (a->lt) { if (a->lt) {
gen_helper_sve_whilel(t2, ptr, t2, t3); gen_helper_sve_whilel(t2, ptr, t2, tcg_constant_i32(desc));
} else { } else {
gen_helper_sve_whileg(t2, ptr, t2, t3); gen_helper_sve_whileg(t2, ptr, t2, tcg_constant_i32(desc));
} }
do_pred_flags(t2); do_pred_flags(t2);
tcg_temp_free_ptr(ptr); tcg_temp_free_ptr(ptr);
tcg_temp_free_i32(t2); tcg_temp_free_i32(t2);
tcg_temp_free_i32(t3);
return true; return true;
} }
static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a) static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a)
{ {
TCGv_i64 op0, op1, diff, t1, tmax; TCGv_i64 op0, op1, diff, t1, tmax;
TCGv_i32 t2, t3; TCGv_i32 t2;
TCGv_ptr ptr; TCGv_ptr ptr;
unsigned vsz = vec_full_reg_size(s); unsigned vsz = vec_full_reg_size(s);
unsigned desc = 0; unsigned desc = 0;
@ -3697,7 +3694,7 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a)
op0 = read_cpu_reg(s, a->rn, 1); op0 = read_cpu_reg(s, a->rn, 1);
op1 = read_cpu_reg(s, a->rm, 1); op1 = read_cpu_reg(s, a->rm, 1);
tmax = tcg_const_i64(vsz); tmax = tcg_constant_i64(vsz);
diff = tcg_temp_new_i64(); diff = tcg_temp_new_i64();
if (a->rw) { if (a->rw) {
@ -3723,7 +3720,6 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a)
/* Bound to the maximum. */ /* Bound to the maximum. */
tcg_gen_umin_i64(diff, diff, tmax); tcg_gen_umin_i64(diff, diff, tmax);
tcg_temp_free_i64(tmax);
/* Since we're bounded, pass as a 32-bit type. */ /* Since we're bounded, pass as a 32-bit type. */
t2 = tcg_temp_new_i32(); t2 = tcg_temp_new_i32();
@ -3732,17 +3728,15 @@ static bool trans_WHILE_ptr(DisasContext *s, arg_WHILE_ptr *a)
desc = FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8); desc = FIELD_DP32(desc, PREDDESC, OPRSZ, vsz / 8);
desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz); desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
t3 = tcg_const_i32(desc);
ptr = tcg_temp_new_ptr(); ptr = tcg_temp_new_ptr();
tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd)); tcg_gen_addi_ptr(ptr, cpu_env, pred_full_reg_offset(s, a->rd));
gen_helper_sve_whilel(t2, ptr, t2, t3); gen_helper_sve_whilel(t2, ptr, t2, tcg_constant_i32(desc));
do_pred_flags(t2); do_pred_flags(t2);
tcg_temp_free_ptr(ptr); tcg_temp_free_ptr(ptr);
tcg_temp_free_i32(t2); tcg_temp_free_i32(t2);
tcg_temp_free_i32(t3);
return true; return true;
} }