mirror of https://github.com/xemu-project/xemu.git
Hexagon (target/hexagon) Clean up handling of modifier registers
Currently, the register number (MuN) for modifier registers is the modifier register number rather than the index into hex_gpr. This patch changes MuN to the hex_gpr index, which is consistent with the handling of control registers. Note that HELPER(fcircadd) needs the CS register corresponding to the modifier register specified in the instruction. We create a TCGv variable "CS" to hold the value to pass to the helper. Reviewed-by: Brian Cain <bcain@quicinc.com> Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> Message-Id: <20231210220712.491494-2-ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>
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@ -68,15 +68,14 @@
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do { \
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TCGv tcgv_siV = tcg_constant_tl(siV); \
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tcg_gen_mov_tl(EA, RxV); \
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gen_helper_fcircadd(RxV, RxV, tcgv_siV, MuV, \
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hex_gpr[HEX_REG_CS0 + MuN]); \
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gen_helper_fcircadd(RxV, RxV, tcgv_siV, MuV, CS); \
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} while (0)
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#define GET_EA_pcr(SHIFT) \
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do { \
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TCGv ireg = tcg_temp_new(); \
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tcg_gen_mov_tl(EA, RxV); \
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gen_read_ireg(ireg, MuV, (SHIFT)); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 + MuN]); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \
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} while (0)
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/* Instructions with multiple definitions */
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@ -113,7 +112,7 @@
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TCGv ireg = tcg_temp_new(); \
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tcg_gen_mov_tl(EA, RxV); \
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gen_read_ireg(ireg, MuV, SHIFT); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 + MuN]); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \
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LOAD; \
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} while (0)
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@ -427,7 +426,7 @@
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TCGv BYTE G_GNUC_UNUSED = tcg_temp_new(); \
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tcg_gen_mov_tl(EA, RxV); \
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gen_read_ireg(ireg, MuV, SHIFT); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 + MuN]); \
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gen_helper_fcircadd(RxV, RxV, ireg, MuV, CS); \
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STORE; \
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} while (0)
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@ -99,10 +99,15 @@ def genptr_decl(f, tag, regtype, regid, regno):
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hex_common.bad_register(regtype, regid)
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elif regtype == "M":
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if regid == "u":
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f.write(f" const int {regtype}{regid}N = " f"insn->regno[{regno}];\n")
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f.write(
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f" TCGv {regtype}{regid}V = hex_gpr[{regtype}{regid}N + "
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"HEX_REG_M0];\n"
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f" const int {regN} = insn->regno[{regno}] + HEX_REG_M0;\n"
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)
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f.write(
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f" TCGv {regtype}{regid}V = hex_gpr[{regN}];\n"
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)
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f.write(
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f" TCGv CS G_GNUC_UNUSED = "
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f"hex_gpr[{regN} - HEX_REG_M0 + HEX_REG_CS0];\n"
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)
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else:
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hex_common.bad_register(regtype, regid)
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@ -528,7 +533,7 @@ def gen_tcg_func(f, tag, regs, imms):
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):
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declared.append(f"{regtype}{regid}V")
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if regtype == "M":
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declared.append(f"{regtype}{regid}N")
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declared.append("CS")
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elif hex_common.is_new_val(regtype, regid, tag):
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declared.append(f"{regtype}{regid}N")
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else:
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@ -1541,10 +1541,8 @@ void gen_circ_op(Context *c,
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HexValue *increment,
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HexValue *modifier)
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{
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HexValue cs = gen_tmp(c, locp, 32, UNSIGNED);
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HexValue increment_m = *increment;
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increment_m = rvalue_materialize(c, locp, &increment_m);
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OUT(c, locp, "gen_read_reg(", &cs, ", HEX_REG_CS0 + MuN);\n");
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OUT(c,
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locp,
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"gen_helper_fcircadd(",
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@ -1555,7 +1553,7 @@ void gen_circ_op(Context *c,
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&increment_m,
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", ",
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modifier);
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OUT(c, locp, ", ", &cs, ");\n");
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OUT(c, locp, ", CS);\n");
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}
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HexValue gen_locnt_op(Context *c, YYLTYPE *locp, HexValue *src)
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@ -2080,9 +2078,9 @@ void emit_arg(Context *c, YYLTYPE *locp, HexValue *arg)
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char reg_id[5];
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reg_compose(c, locp, &(arg->reg), reg_id);
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EMIT_SIG(c, ", %s %s", type, reg_id);
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/* MuV register requires also MuN to provide its index */
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/* MuV register requires also CS for circular addressing*/
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if (arg->reg.type == MODIFIER) {
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EMIT_SIG(c, ", int MuN");
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EMIT_SIG(c, ", TCGv CS");
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}
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}
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break;
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@ -462,8 +462,7 @@ static inline TCGv gen_read_ireg(TCGv result, TCGv val, int shift)
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#define fPM_CIRI(REG, IMM, MVAL) \
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do { \
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TCGv tcgv_siV = tcg_constant_tl(siV); \
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gen_helper_fcircadd(REG, REG, tcgv_siV, MuV, \
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hex_gpr[HEX_REG_CS0 + MuN]); \
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gen_helper_fcircadd(REG, REG, tcgv_siV, MuV, CS); \
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} while (0)
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#else
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#define fEA_IMM(IMM) do { EA = (IMM); } while (0)
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