From 40a0bba1e3feff9c3aa05e56db07eec9e72393e5 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sat, 9 Jan 2021 21:16:36 +0100 Subject: [PATCH] vt82c686: Correct vt82c686-pm I/O size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Section "Offset 4B-48 – Power Management I/O Base" describes: Port Address for the base of the 128-byte Power Management I/O Register block. Correct the vt82c686-pm I/O region size. Signed-off-by: BALATON Zoltan Message-Id: [PMD: Split original patch, this is part 2/4, reduced size to 128B] Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/vt82c686.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 7e6a07fca4..fe8ae24c42 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -176,7 +176,7 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error **errp) apm_init(dev, &s->apm, NULL, s); memory_region_init_io(&s->io, OBJECT(dev), &pm_io_ops, s, - "vt82c686-pm", 64); + "vt82c686-pm", 128); memory_region_add_subregion(pci_address_space_io(dev), 0, &s->io); memory_region_set_enabled(&s->io, false);