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exec.h cleanup 

Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2011-07-13 12:44:15 +00:00
parent 104bf02eb5
commit 3e4571724f
32 changed files with 273 additions and 620 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
dyngen-exec.h
View File

@ -64,6 +64,8 @@ typedef void * host_reg_t;
#error unsupported CPU #error unsupported CPU
#endif #endif
register CPUState *env asm(AREG0);
#define xglue(x, y) x ## y #define xglue(x, y) x ## y
#define glue(x, y) xglue(x, y) #define glue(x, y) xglue(x, y)
#define stringify(s) tostring(s) #define stringify(s) tostring(s)

2
hw/spapr_hcall.c
View File

@ -1,9 +1,9 @@
#include "sysemu.h" #include "sysemu.h"
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "qemu-char.h" #include "qemu-char.h"
#include "sysemu.h" #include "sysemu.h"
#include "qemu-char.h" #include "qemu-char.h"
#include "exec.h"
#include "helper_regs.h" #include "helper_regs.h"
#include "hw/spapr.h" #include "hw/spapr.h"

39
target-alpha/exec.h
View File

@ -1,39 +0,0 @@
/*
* Alpha emulation cpu run-time definitions for qemu.
*
* Copyright (c) 2007 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#if !defined (__ALPHA_EXEC_H__)
#define __ALPHA_EXEC_H__
#include "config.h"
#include "dyngen-exec.h"
#define TARGET_LONG_BITS 64
register struct CPUAlphaState *env asm(AREG0);
#define FP_STATUS (env->fp_status)
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#endif /* !defined (__ALPHA_EXEC_H__) */

7
target-alpha/op_helper.c
View File

@ -17,12 +17,15 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "softfloat.h" #include "softfloat.h"
#include "helper.h" #include "helper.h"
#include "qemu-timer.h" #include "qemu-timer.h"
#define FP_STATUS (env->fp_status)
/*****************************************************************************/ /*****************************************************************************/
/* Exceptions processing helpers */ /* Exceptions processing helpers */
@ -1311,6 +1314,8 @@ void QEMU_NORETURN cpu_unassigned_access(CPUState *env1,
dynamic_excp(EXCP_MCHK, 0); dynamic_excp(EXCP_MCHK, 0);
} }
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu
#define ALIGNED_ONLY #define ALIGNED_ONLY

30
target-arm/exec.h
View File

@ -1,30 +0,0 @@
/*
* ARM execution defines
*
* Copyright (c) 2003 Fabrice Bellard
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "config.h"
#include "dyngen-exec.h"
register struct CPUARMState *env asm(AREG0);
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif
void raise_exception(int);

9
target-arm/op_helper.c
View File

@ -16,17 +16,20 @@
* You should have received a copy of the GNU Lesser General Public * You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
#define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT (uint32_t)0x80000000
#define SIGNBIT64 ((uint64_t)1 << 63) #define SIGNBIT64 ((uint64_t)1 << 63)
void raise_exception(int tt) #if !defined(CONFIG_USER_ONLY)
static void raise_exception(int tt)
{ {
env->exception_index = tt; env->exception_index = tt;
cpu_loop_exit(env); cpu_loop_exit(env);
} }
#endif
uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
uint32_t rn, uint32_t maxindex) uint32_t rn, uint32_t maxindex)
@ -52,6 +55,8 @@ uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu
#define SHIFT 0 #define SHIFT 0

28
target-cris/exec.h
View File

@ -1,28 +0,0 @@
/*
* CRIS execution defines
*
* Copyright (c) 2007 AXIS Communications AB
* Written by Edgar E. Iglesias
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "dyngen-exec.h"
register struct CPUCRISState *env asm(AREG0);
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif

4
target-cris/op_helper.c
View File

@ -18,7 +18,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "mmu.h" #include "mmu.h"
#include "helper.h" #include "helper.h"
#include "host-utils.h" #include "host-utils.h"
@ -35,6 +36,7 @@
#endif #endif
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu

3
target-i386/cpu.h
View File

@ -1050,6 +1050,9 @@ void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank,
/* op_helper.c */ /* op_helper.c */
void do_interrupt(CPUState *env); void do_interrupt(CPUState *env);
void do_interrupt_x86_hardirq(CPUState *env, int intno, int is_hw); void do_interrupt_x86_hardirq(CPUState *env, int intno, int is_hw);
void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
void QEMU_NORETURN raise_exception_err_env(CPUState *nenv, int exception_index,
int error_code);
void do_smm_enter(CPUState *env1); void do_smm_enter(CPUState *env1);

142
target-i386/exec.h
View File

@ -1,142 +0,0 @@
/*
* i386 execution defines
*
* Copyright (c) 2003 Fabrice Bellard
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "config.h"
#include "dyngen-exec.h"
/* XXX: factorize this mess */
#ifdef TARGET_X86_64
#define TARGET_LONG_BITS 64
#else
#define TARGET_LONG_BITS 32
#endif
#include "cpu-defs.h"
register struct CPUX86State *env asm(AREG0);
#include "qemu-common.h"
#include "qemu-log.h"
#include "cpu.h"
/* op_helper.c */
void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
void QEMU_NORETURN raise_exception(int exception_index);
void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
/* n must be a constant to be efficient */
static inline target_long lshift(target_long x, int n)
{
if (n >= 0)
return x << n;
else
return x >> (-n);
}
#include "helper.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#define RC_MASK 0xc00
#define RC_NEAR 0x000
#define RC_DOWN 0x400
#define RC_UP 0x800
#define RC_CHOP 0xc00
#define MAXTAN 9223372036854775808.0
/* the following deal with x86 long double-precision numbers */
#define MAXEXPD 0x7fff
#define EXPBIAS 16383
#define EXPD(fp) (fp.l.upper & 0x7fff)
#define SIGND(fp) ((fp.l.upper) & 0x8000)
#define MANTD(fp) (fp.l.lower)
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
static inline void fpush(void)
{
env->fpstt = (env->fpstt - 1) & 7;
env->fptags[env->fpstt] = 0; /* validate stack entry */
}
static inline void fpop(void)
{
env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
env->fpstt = (env->fpstt + 1) & 7;
}
static inline floatx80 helper_fldt(target_ulong ptr)
{
CPU_LDoubleU temp;
temp.l.lower = ldq(ptr);
temp.l.upper = lduw(ptr + 8);
return temp.d;
}
static inline void helper_fstt(floatx80 f, target_ulong ptr)
{
CPU_LDoubleU temp;
temp.d = f;
stq(ptr, temp.l.lower);
stw(ptr + 8, temp.l.upper);
}
#define FPUS_IE (1 << 0)
#define FPUS_DE (1 << 1)
#define FPUS_ZE (1 << 2)
#define FPUS_OE (1 << 3)
#define FPUS_UE (1 << 4)
#define FPUS_PE (1 << 5)
#define FPUS_SF (1 << 6)
#define FPUS_SE (1 << 7)
#define FPUS_B (1 << 15)
#define FPUC_EM 0x3f
static inline uint32_t compute_eflags(void)
{
return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
}
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
static inline void load_eflags(int eflags, int update_mask)
{
CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
DF = 1 - (2 * ((eflags >> 10) & 1));
env->eflags = (env->eflags & ~update_mask) |
(eflags & update_mask) | 0x2;
}
/* load efer and update the corresponding hflags. XXX: do consistency
checks with cpuid bits ? */
static inline void cpu_load_efer(CPUState *env, uint64_t val)
{
env->efer = val;
env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
if (env->efer & MSR_EFER_LMA)
env->hflags |= HF_LMA_MASK;
if (env->efer & MSR_EFER_SVME)
env->hflags |= HF_SVME_MASK;
}

2
target-i386/helper.c
View File

@ -1027,8 +1027,6 @@ int check_hw_breakpoints(CPUState *env, int force_dr6_update)
static CPUDebugExcpHandler *prev_debug_excp_handler; static CPUDebugExcpHandler *prev_debug_excp_handler;
void raise_exception_env(int exception_index, CPUState *env);
static void breakpoint_handler(CPUState *env) static void breakpoint_handler(CPUState *env)
{ {
CPUBreakpoint *bp; CPUBreakpoint *bp;

165
target-i386/op_helper.c
View File

@ -18,13 +18,21 @@
*/ */
#include <math.h> #include <math.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "ioport.h" #include "ioport.h"
#include "qemu-common.h"
#include "qemu-log.h"
#include "cpu-defs.h"
#include "helper.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
//#define DEBUG_PCALL //#define DEBUG_PCALL
#ifdef DEBUG_PCALL #ifdef DEBUG_PCALL
# define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) # define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__)
# define LOG_PCALL_STATE(env) \ # define LOG_PCALL_STATE(env) \
@ -34,6 +42,101 @@
# define LOG_PCALL_STATE(env) do { } while (0) # define LOG_PCALL_STATE(env) do { } while (0)
#endif #endif
/* n must be a constant to be efficient */
static inline target_long lshift(target_long x, int n)
{
if (n >= 0) {
return x << n;
} else {
return x >> (-n);
}
}
#define RC_MASK 0xc00
#define RC_NEAR 0x000
#define RC_DOWN 0x400
#define RC_UP 0x800
#define RC_CHOP 0xc00
#define MAXTAN 9223372036854775808.0
/* the following deal with x86 long double-precision numbers */
#define MAXEXPD 0x7fff
#define EXPBIAS 16383
#define EXPD(fp) (fp.l.upper & 0x7fff)
#define SIGND(fp) ((fp.l.upper) & 0x8000)
#define MANTD(fp) (fp.l.lower)
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
static inline void fpush(void)
{
env->fpstt = (env->fpstt - 1) & 7;
env->fptags[env->fpstt] = 0; /* validate stack entry */
}
static inline void fpop(void)
{
env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
env->fpstt = (env->fpstt + 1) & 7;
}
static inline floatx80 helper_fldt(target_ulong ptr)
{
CPU_LDoubleU temp;
temp.l.lower = ldq(ptr);
temp.l.upper = lduw(ptr + 8);
return temp.d;
}
static inline void helper_fstt(floatx80 f, target_ulong ptr)
{
CPU_LDoubleU temp;
temp.d = f;
stq(ptr, temp.l.lower);
stw(ptr + 8, temp.l.upper);
}
#define FPUS_IE (1 << 0)
#define FPUS_DE (1 << 1)
#define FPUS_ZE (1 << 2)
#define FPUS_OE (1 << 3)
#define FPUS_UE (1 << 4)
#define FPUS_PE (1 << 5)
#define FPUS_SF (1 << 6)
#define FPUS_SE (1 << 7)
#define FPUS_B (1 << 15)
#define FPUC_EM 0x3f
static inline uint32_t compute_eflags(void)
{
return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
}
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
static inline void load_eflags(int eflags, int update_mask)
{
CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
DF = 1 - (2 * ((eflags >> 10) & 1));
env->eflags = (env->eflags & ~update_mask) |
(eflags & update_mask) | 0x2;
}
/* load efer and update the corresponding hflags. XXX: do consistency
checks with cpuid bits ? */
static inline void cpu_load_efer(CPUState *env, uint64_t val)
{
env->efer = val;
env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
if (env->efer & MSR_EFER_LMA) {
env->hflags |= HF_LMA_MASK;
}
if (env->efer & MSR_EFER_SVME) {
env->hflags |= HF_SVME_MASK;
}
}
#if 0 #if 0
#define raise_exception_err(a, b)\ #define raise_exception_err(a, b)\
@ -43,6 +146,9 @@ do {\
} while (0) } while (0)
#endif #endif
static void QEMU_NORETURN raise_exception_err(int exception_index,
int error_code);
static const uint8_t parity_table[256] = { static const uint8_t parity_table[256] = {
CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
@ -1381,12 +1487,20 @@ static void QEMU_NORETURN raise_interrupt(int intno, int is_int, int error_code,
/* shortcuts to generate exceptions */ /* shortcuts to generate exceptions */
void raise_exception_err(int exception_index, int error_code) static void QEMU_NORETURN raise_exception_err(int exception_index,
int error_code)
{ {
raise_interrupt(exception_index, 0, error_code, 0); raise_interrupt(exception_index, 0, error_code, 0);
} }
void raise_exception(int exception_index) void raise_exception_err_env(CPUState *nenv, int exception_index,
int error_code)
{
env = nenv;
raise_interrupt(exception_index, 0, error_code, 0);
}
static void QEMU_NORETURN raise_exception(int exception_index)
{ {
raise_interrupt(exception_index, 0, 0, 0); raise_interrupt(exception_index, 0, 0, 0);
} }
@ -4426,6 +4540,49 @@ void helper_frstor(target_ulong ptr, int data32)
} }
} }
#if defined(CONFIG_USER_ONLY)
void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
selector &= 0xffff;
cpu_x86_load_seg_cache(env, seg_reg, selector,
(selector << 4), 0xffff, 0);
} else {
helper_load_seg(seg_reg, selector);
}
env = saved_env;
}
void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
helper_fsave(ptr, data32);
env = saved_env;
}
void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
helper_frstor(ptr, data32);
env = saved_env;
}
#endif
void helper_fxsave(target_ulong ptr, int data64) void helper_fxsave(target_ulong ptr, int data64)
{ {
int fpus, fptag, i, nb_xmm_regs; int fpus, fptag, i, nb_xmm_regs;

38
target-lm32/exec.h
View File

@ -1,38 +0,0 @@
/*
* LatticeMico32 execution defines.
*
* Copyright (c) 2010 Michael Walle <michael@walle.cc>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "dyngen-exec.h"
register struct CPULM32State *env asm(AREG0);
#include "cpu.h"
static inline int cpu_halted(CPUState *env)
{
if (!env->halted) {
return 0;
}
/* IRQ execeptions wakes us up. */
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}

3
target-lm32/op_helper.c
View File

@ -1,5 +1,6 @@
#include <assert.h> #include <assert.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
#include "host-utils.h" #include "host-utils.h"

28
target-m68k/exec.h
View File

@ -1,28 +0,0 @@
/*
* m68k execution defines
*
* Copyright (c) 2005-2006 CodeSourcery
* Written by Paul Brook
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "dyngen-exec.h"
register struct CPUM68KState *env asm(AREG0);
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif

5
target-m68k/op_helper.c
View File

@ -16,7 +16,8 @@
* You should have received a copy of the GNU Lesser General Public * You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helpers.h" #include "helpers.h"
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
@ -34,6 +35,8 @@ void do_interrupt_m68k_hardirq(CPUState *env1)
extern int semihosting_enabled; extern int semihosting_enabled;
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu
#define SHIFT 0 #define SHIFT 0

27
target-microblaze/exec.h
View File

@ -1,27 +0,0 @@
/*
* Microblaze execution defines
*
* Copyright (c) 2009 Edgar E. Iglesias
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "dyngen-exec.h"
register struct CPUMBState *env asm(AREG0);
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif

5
target-microblaze/op_helper.c
View File

@ -18,13 +18,16 @@
*/ */
#include <assert.h> #include <assert.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
#include "host-utils.h" #include "host-utils.h"
#define D(x) #define D(x)
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu
#define SHIFT 0 #define SHIFT 0
#include "softmmu_template.h" #include "softmmu_template.h"

2
target-mips/cpu.h
View File

@ -1,6 +1,8 @@
#if !defined (__MIPS_CPU_H__) #if !defined (__MIPS_CPU_H__)
#define __MIPS_CPU_H__ #define __MIPS_CPU_H__
//#define DEBUG_OP
#define TARGET_HAS_ICE 1 #define TARGET_HAS_ICE 1
#define ELF_MACHINE EM_MIPS #define ELF_MACHINE EM_MIPS

60
target-mips/exec.h
View File

@ -1,60 +0,0 @@
#if !defined(__QEMU_MIPS_EXEC_H__)
#define __QEMU_MIPS_EXEC_H__
//#define DEBUG_OP
#include "config.h"
#include "mips-defs.h"
#include "dyngen-exec.h"
#include "cpu-defs.h"
register struct CPUMIPSState *env asm(AREG0);
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
static inline void compute_hflags(CPUState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU |
MIPS_HFLAG_UX);
if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
!(env->CP0_Status & (1 << CP0St_ERL)) &&
!(env->hflags & MIPS_HFLAG_DM)) {
env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;
}
#if defined(TARGET_MIPS64)
if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) ||
(env->CP0_Status & (1 << CP0St_PX)) ||
(env->CP0_Status & (1 << CP0St_UX)))
env->hflags |= MIPS_HFLAG_64;
if (env->CP0_Status & (1 << CP0St_UX))
env->hflags |= MIPS_HFLAG_UX;
#endif
if ((env->CP0_Status & (1 << CP0St_CU0)) ||
!(env->hflags & MIPS_HFLAG_KSU))
env->hflags |= MIPS_HFLAG_CP0;
if (env->CP0_Status & (1 << CP0St_CU1))
env->hflags |= MIPS_HFLAG_FPU;
if (env->CP0_Status & (1 << CP0St_FR))
env->hflags |= MIPS_HFLAG_F64;
if (env->insn_flags & ISA_MIPS32R2) {
if (env->active_fpu.fcr0 & (1 << FCR0_F64))
env->hflags |= MIPS_HFLAG_COP1X;
} else if (env->insn_flags & ISA_MIPS32) {
if (env->hflags & MIPS_HFLAG_64)
env->hflags |= MIPS_HFLAG_COP1X;
} else if (env->insn_flags & ISA_MIPS4) {
/* All supported MIPS IV CPUs use the XX (CU3) to enable
and disable the MIPS IV extensions to the MIPS III ISA.
Some other MIPS IV CPUs ignore the bit, so the check here
would be too restrictive for them. */
if (env->CP0_Status & (1 << CP0St_CU3))
env->hflags |= MIPS_HFLAG_COP1X;
}
}
#endif /* !defined(__QEMU_MIPS_EXEC_H__) */

56
target-mips/op_helper.c
View File

@ -17,16 +17,70 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include <stdlib.h> #include <stdlib.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "helper.h" #include "helper.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static inline void cpu_mips_tlb_flush (CPUState *env, int flush_global); static inline void cpu_mips_tlb_flush (CPUState *env, int flush_global);
#endif #endif
static inline void compute_hflags(CPUState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU |
MIPS_HFLAG_UX);
if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
!(env->CP0_Status & (1 << CP0St_ERL)) &&
!(env->hflags & MIPS_HFLAG_DM)) {
env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;
}
#if defined(TARGET_MIPS64)
if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) ||
(env->CP0_Status & (1 << CP0St_PX)) ||
(env->CP0_Status & (1 << CP0St_UX))) {
env->hflags |= MIPS_HFLAG_64;
}
if (env->CP0_Status & (1 << CP0St_UX)) {
env->hflags |= MIPS_HFLAG_UX;
}
#endif
if ((env->CP0_Status & (1 << CP0St_CU0)) ||
!(env->hflags & MIPS_HFLAG_KSU)) {
env->hflags |= MIPS_HFLAG_CP0;
}
if (env->CP0_Status & (1 << CP0St_CU1)) {
env->hflags |= MIPS_HFLAG_FPU;
}
if (env->CP0_Status & (1 << CP0St_FR)) {
env->hflags |= MIPS_HFLAG_F64;
}
if (env->insn_flags & ISA_MIPS32R2) {
if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
env->hflags |= MIPS_HFLAG_COP1X;
}
} else if (env->insn_flags & ISA_MIPS32) {
if (env->hflags & MIPS_HFLAG_64) {
env->hflags |= MIPS_HFLAG_COP1X;
}
} else if (env->insn_flags & ISA_MIPS4) {
/* All supported MIPS IV CPUs use the XX (CU3) to enable
and disable the MIPS IV extensions to the MIPS III ISA.
Some other MIPS IV CPUs ignore the bit, so the check here
would be too restrictive for them. */
if (env->CP0_Status & (1 << CP0St_CU3)) {
env->hflags |= MIPS_HFLAG_COP1X;
}
}
}
/*****************************************************************************/ /*****************************************************************************/
/* Exceptions processing helpers */ /* Exceptions processing helpers */

34
target-ppc/exec.h
View File

@ -1,34 +0,0 @@
/*
* PowerPC emulation definitions for qemu.
*
* Copyright (c) 2003-2007 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#if !defined (__PPC_H__)
#define __PPC_H__
#include "config.h"
#include "dyngen-exec.h"
#include "cpu.h"
register struct CPUPPCState *env asm(AREG0);
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#endif /* !defined (__PPC_H__) */

7
target-ppc/op_helper.c
View File

@ -17,12 +17,17 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include <string.h> #include <string.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "helper.h" #include "helper.h"
#include "helper_regs.h" #include "helper_regs.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
//#define DEBUG_OP //#define DEBUG_OP
//#define DEBUG_EXCEPTIONS //#define DEBUG_EXCEPTIONS
//#define DEBUG_SOFTWARE_TLB //#define DEBUG_SOFTWARE_TLB

37
target-s390x/exec.h
View File

@ -1,37 +0,0 @@
/*
* S/390 execution defines
*
* Copyright (c) 2009 Ulrich Hecht
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "dyngen-exec.h"
register struct CPUS390XState *env asm(AREG0);
#include "config.h"
#include "cpu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
static inline void regs_to_env(void)
{
}
static inline void env_to_regs(void)
{
}

4
target-s390x/op_helper.c
View File

@ -18,7 +18,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "helpers.h" #include "helpers.h"
#include <string.h> #include <string.h>
@ -31,6 +32,7 @@
/*****************************************************************************/ /*****************************************************************************/
/* Softmmu support */ /* Softmmu support */
#if !defined (CONFIG_USER_ONLY) #if !defined (CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu

33
target-sh4/exec.h
View File

@ -1,33 +0,0 @@
/*
* SH4 emulation
*
* Copyright (c) 2005 Samuel Tardieu
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _EXEC_SH4_H
#define _EXEC_SH4_H
#include "config.h"
#include "dyngen-exec.h"
register struct CPUSH4State *env asm(AREG0);
#include "cpu.h"
#ifndef CONFIG_USER_ONLY
#include "softmmu_exec.h"
#endif
#endif /* _EXEC_SH4_H */

4
target-sh4/op_helper.c
View File

@ -18,7 +18,8 @@
*/ */
#include <assert.h> #include <assert.h>
#include <stdlib.h> #include <stdlib.h>
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
static void cpu_restore_state_from_retaddr(void *retaddr) static void cpu_restore_state_from_retaddr(void *retaddr)
@ -38,6 +39,7 @@ static void cpu_restore_state_from_retaddr(void *retaddr)
} }
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
#include "softmmu_exec.h"
#define MMUSUFFIX _mmu #define MMUSUFFIX _mmu

15
target-sparc/exec.h
View File

@ -1,15 +0,0 @@
#ifndef EXEC_SPARC_H
#define EXEC_SPARC_H 1
#include "config.h"
#include "dyngen-exec.h"
register struct CPUSPARCState *env asm(AREG0);
#include "cpu.h"
#include "exec-all.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
#endif

7
target-sparc/op_helper.c
View File

@ -1,8 +1,13 @@
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "helper.h" #include "helper.h"
#include "sysemu.h" #include "sysemu.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif
//#define DEBUG_MMU //#define DEBUG_MMU
//#define DEBUG_MXCC //#define DEBUG_MXCC
//#define DEBUG_UNALIGNED //#define DEBUG_UNALIGNED

43
target-unicore32/exec.h
View File

@ -1,43 +0,0 @@
/*
* UniCore32 execution defines
*
* Copyright (C) 2010-2011 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UC32_EXEC_H__
#define __UC32_EXEC_H__
#include "config.h"
#include "dyngen-exec.h"
register struct CPUState_UniCore32 *env asm(AREG0);
#include "cpu.h"
static inline void env_to_regs(void)
{
}
static inline void regs_to_env(void)
{
}
static inline int cpu_halted(CPUState *env)
{
if (!env->halted) {
return 0;
}
/* An interrupt wakes the CPU even if the I and R ASR bits are
set. We use EXITTB to silently wake CPU without causing an
actual interrupt. */
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
#endif /* __UC32_EXEC_H__ */

3
target-unicore32/op_helper.c
View File

@ -7,7 +7,8 @@
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
#define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT (uint32_t)0x80000000

49
user-exec.c
View File

@ -17,7 +17,8 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "config.h" #include "config.h"
#include "exec.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "disas.h" #include "disas.h"
#include "tcg.h" #include "tcg.h"
@ -40,7 +41,7 @@
static void exception_action(CPUState *env1) static void exception_action(CPUState *env1)
{ {
#if defined(TARGET_I386) #if defined(TARGET_I386)
raise_exception_err(env1->exception_index, env1->error_code); raise_exception_err_env(env1, env1->exception_index, env1->error_code);
#else #else
cpu_loop_exit(env1); cpu_loop_exit(env1);
#endif #endif
@ -628,47 +629,3 @@ int cpu_signal_handler(int host_signum, void *pinfo,
#error host CPU specific signal handler needed #error host CPU specific signal handler needed
#endif #endif
#if defined(TARGET_I386)
void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) {
selector &= 0xffff;
cpu_x86_load_seg_cache(env, seg_reg, selector,
(selector << 4), 0xffff, 0);
} else {
helper_load_seg(seg_reg, selector);
}
env = saved_env;
}
void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
helper_fsave(ptr, data32);
env = saved_env;
}
void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32)
{
CPUX86State *saved_env;
saved_env = env;
env = s;
helper_frstor(ptr, data32);
env = saved_env;
}
#endif /* TARGET_I386 */