mirror of https://github.com/xemu-project/xemu.git
target/arm: do S1_ptw_translate() before address space lookup
In the secure stage 2 translation regime, the VSTCR.SW and VTCR.NSW bits can invert the secure flag for pagetable walks. This patchset allows S1_ptw_translate() to change the non-secure bit. Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210112104511.36576-11-remi.denis.courmont@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -10393,7 +10393,7 @@ static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx,
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/* Translate a S1 pagetable walk through S2 if needed. */
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/* Translate a S1 pagetable walk through S2 if needed. */
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static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
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static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
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hwaddr addr, MemTxAttrs txattrs,
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hwaddr addr, bool *is_secure,
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ARMMMUFaultInfo *fi)
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ARMMMUFaultInfo *fi)
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{
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{
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if (arm_mmu_idx_is_stage1_of_2(mmu_idx) &&
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if (arm_mmu_idx_is_stage1_of_2(mmu_idx) &&
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@ -10403,6 +10403,9 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
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int s2prot;
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int s2prot;
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int ret;
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int ret;
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ARMCacheAttrs cacheattrs = {};
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ARMCacheAttrs cacheattrs = {};
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MemTxAttrs txattrs = {};
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assert(!*is_secure); /* TODO: S-EL2 */
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ret = get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, ARMMMUIdx_Stage2,
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ret = get_phys_addr_lpae(env, addr, MMU_DATA_LOAD, ARMMMUIdx_Stage2,
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false,
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false,
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@ -10443,9 +10446,9 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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AddressSpace *as;
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AddressSpace *as;
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uint32_t data;
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uint32_t data;
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addr = S1_ptw_translate(env, mmu_idx, addr, &is_secure, fi);
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attrs.secure = is_secure;
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attrs.secure = is_secure;
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as = arm_addressspace(cs, attrs);
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as = arm_addressspace(cs, attrs);
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addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fi);
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if (fi->s1ptw) {
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if (fi->s1ptw) {
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return 0;
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return 0;
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}
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}
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@ -10472,9 +10475,9 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
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AddressSpace *as;
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AddressSpace *as;
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uint64_t data;
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uint64_t data;
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addr = S1_ptw_translate(env, mmu_idx, addr, &is_secure, fi);
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attrs.secure = is_secure;
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attrs.secure = is_secure;
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as = arm_addressspace(cs, attrs);
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as = arm_addressspace(cs, attrs);
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addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fi);
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if (fi->s1ptw) {
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if (fi->s1ptw) {
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return 0;
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return 0;
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}
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}
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