mirror of https://github.com/xemu-project/xemu.git
target-ppc: Scalar Round to Single Precision
This patch adds the VSX Scalar Round to Single Precision (xsrsp) instruction. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -2666,3 +2666,14 @@ VSX_ROUND(xvrspic, 4, float32, f32, FLOAT_ROUND_CURRENT, 0)
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VSX_ROUND(xvrspim, 4, float32, f32, float_round_down, 0)
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VSX_ROUND(xvrspip, 4, float32, f32, float_round_up, 0)
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VSX_ROUND(xvrspiz, 4, float32, f32, float_round_to_zero, 0)
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uint64_t helper_xsrsp(CPUPPCState *env, uint64_t xb)
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{
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helper_reset_fpstatus(env);
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uint64_t xt = helper_frsp(env, xb);
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helper_compute_fprf(env, xt, 1);
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helper_float_check_status(env);
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return xt;
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}
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@ -293,6 +293,7 @@ DEF_HELPER_2(xssubsp, void, env, i32)
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DEF_HELPER_2(xsmulsp, void, env, i32)
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DEF_HELPER_2(xsdivsp, void, env, i32)
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DEF_HELPER_2(xsresp, void, env, i32)
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DEF_HELPER_2(xsrsp, i64, env, i64)
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DEF_HELPER_2(xssqrtsp, void, env, i32)
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DEF_HELPER_2(xsrsqrtesp, void, env, i32)
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DEF_HELPER_2(xsmaddasp, void, env, i32)
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@ -7400,6 +7400,21 @@ static void gen_##name(DisasContext * ctx) \
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tcg_temp_free_i32(opc); \
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}
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#define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \
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static void gen_##name(DisasContext * ctx) \
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{ \
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if (unlikely(!ctx->vsx_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VSXU); \
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return; \
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} \
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/* NIP cannot be restored if the exception comes */ \
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/* from a helper. */ \
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gen_update_nip(ctx, ctx->nip - 4); \
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\
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gen_helper_##name(cpu_vsrh(xT(ctx->opcode)), cpu_env, \
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cpu_vsrh(xB(ctx->opcode))); \
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}
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GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xssubdp, 0x00, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsmuldp, 0x00, 0x06, 0, PPC2_VSX)
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@ -7434,6 +7449,7 @@ GEN_VSX_HELPER_2(xsrdpic, 0x16, 0x06, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsrdpim, 0x12, 0x07, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsrdpip, 0x12, 0x06, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xsrdpiz, 0x12, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_XT_XB_ENV(xsrsp, 0x12, 0x11, 0, PPC2_VSX207)
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GEN_VSX_HELPER_2(xsaddsp, 0x00, 0x00, 0, PPC2_VSX207)
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GEN_VSX_HELPER_2(xssubsp, 0x00, 0x01, 0, PPC2_VSX207)
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@ -10277,6 +10293,7 @@ GEN_XX3FORM(xssubsp, 0x00, 0x01, PPC2_VSX207),
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GEN_XX3FORM(xsmulsp, 0x00, 0x02, PPC2_VSX207),
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GEN_XX3FORM(xsdivsp, 0x00, 0x03, PPC2_VSX207),
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GEN_XX2FORM(xsresp, 0x14, 0x01, PPC2_VSX207),
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GEN_XX2FORM(xsrsp, 0x12, 0x11, PPC2_VSX207),
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GEN_XX2FORM(xssqrtsp, 0x16, 0x00, PPC2_VSX207),
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GEN_XX2FORM(xsrsqrtesp, 0x14, 0x00, PPC2_VSX207),
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GEN_XX3FORM(xsmaddasp, 0x04, 0x00, PPC2_VSX207),
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