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build fixes for merge

This commit is contained in:
espes 2013-08-20 16:46:49 +10:00
parent ff3f9be0e2
commit 3a7b7d4978
23 changed files with 167 additions and 170 deletions
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4
blockdev.c
View File

@ -2001,6 +2001,10 @@ QemuOptsList qemu_common_drive_opts = {
.name = "boot",
.type = QEMU_OPT_BOOL,
.help = "(deprecated, ignored)",
},{
.name = "locked",
.type = QEMU_OPT_BOOL,
.help = "emulate a security locked drive",
},
{ /* end of list */ }
},

15
default-configs/xbox-softmmu.mak
View File

@ -1,21 +1,30 @@
# Default configuration for xbox-softmmu
include pci.mak
include sound.mak
include usb.mak
CONFIG_VGA=y
CONFIG_VGA_PCI=y
CONFIG_VMMOUSE=y
CONFIG_SERIAL=y
CONFIG_I8254=y
CONFIG_PCSPK=y
CONFIG_PCKBD=y
CONFIG_FDC=y
CONFIG_ACPI=y
CONFIG_APM=y
CONFIG_DMA=y
CONFIG_I8257=y
CONFIG_IDE_ISA=y
CONFIG_IDE_PIIX=y
CONFIG_SOUND=y
CONFIG_HPET=y
CONFIG_I8259=y
CONFIG_PFLASH_CFI01=y
CONFIG_MC146818RTC=y
CONFIG_PCI_PIIX=y
CONFIG_VMPORT=y
CONFIG_LPC_ICH9=y
CONFIG_PCI_Q35=y
CONFIG_APIC=y
CONFIG_IOAPIC=y
CONFIG_ICC_BUS=y
CONFIG_PVPANIC=y
CONFIG_XBOX=y

17
hw/acpi_xbox.c
View File

@ -23,14 +23,15 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "pci/pci.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "acpi.h"
#include "xbox_pci.h"
#include "acpi_xbox.h"
#include "hw/acpi/acpi.h"
#include "hw/xbox_pci.h"
#include "hw/acpi_xbox.h"
//#define DEBUG
#ifdef DEBUG
@ -52,14 +53,14 @@ static void xbox_pm_update_sci_fn(ACPIREGS *regs)
void xbox_pm_init(PCIDevice *dev, XBOX_PMRegs *pm/*, qemu_irq sci_irq*/) {
memory_region_init(&pm->bar, "xbox-pm-bar", 256);
memory_region_init(&pm->bar, OBJECT(dev), "xbox-pm-bar", 256);
pci_register_bar(dev, XBOX_PM_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
&pm->bar);
acpi_pm_tmr_init(&pm->acpi_regs, xbox_pm_update_sci_fn, &pm->bar);
acpi_pm1_evt_init(&pm->acpi_regs, xbox_pm_update_sci_fn, &pm->bar);
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->bar);
acpi_pm1_cnt_init(&pm->acpi_regs, &pm->bar, 2);
//pm->irq = sci_irq;
}

2
hw/acpi_xbox.h
View File

@ -20,7 +20,7 @@
#ifndef HW_ACPI_XBOX_H
#define HW_ACPI_XBOX_H
#include "acpi.h"
#include "hw/acpi/acpi.h"
typedef struct XBOX_PMRegs {
MemoryRegion bar;

8
hw/amd_smbus.c
View File

@ -22,10 +22,10 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "amd_smbus.h"
#include "smbus.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/amd_smbus.h"
#include "hw/i2c/smbus.h"
/* AMD756 SMBus address offsets */
#define SMB_ADDR_OFFSET 0xE0

12
hw/audio/ac97.c
View File

@ -194,7 +194,7 @@ static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
{
uint8_t b[8];
dma_memory_read(s->dma, r->bdbar + r->civ * 8, b, 8);
dma_memory_read(s->as, r->bdbar + r->civ * 8, b, 8);
r->bd_valid = 1;
r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
@ -951,7 +951,7 @@ static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
while (temp) {
int copied;
to_copy = audio_MIN (temp, sizeof (tmpbuf));
dma_memory_read (s->dma, addr, tmpbuf, to_copy);
dma_memory_read (s->as, addr, tmpbuf, to_copy);
copied = AUD_write (s->voice_po, tmpbuf, to_copy);
dolog ("write_audio max=%x to_copy=%x copied=%x\n",
max, to_copy, copied);
@ -1032,7 +1032,7 @@ static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
*stop = 1;
break;
}
dma_memory_write (s->dma, addr, tmpbuf, acquired);
dma_memory_write (s->as, addr, tmpbuf, acquired);
temp -= acquired;
addr += acquired;
nread += acquired;
@ -1280,10 +1280,10 @@ static void ac97_on_reset (void *opaque)
void ac97_common_init (AC97LinkState *s,
qemu_irq irq,
DMAContext *dma)
AddressSpace *as)
{
s->irq = irq;
s->dma = dma;
s->as = as;
qemu_register_reset (ac97_on_reset, s);
AUD_register_card ("ac97", &s->card);
@ -1398,7 +1398,7 @@ static int ac97_initfn (PCIDevice *dev)
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
ac97_common_init(&s->state, s->dev.irq[0], pci_dma_context(&s->dev));
ac97_common_init(&s->state, s->dev.irq[0], pci_get_address_space(&s->dev));
return 0;
}

10
hw/audio/ac97_int.h
View File

@ -20,10 +20,10 @@
#ifndef HW_AC97_INT_H
#define HW_AC97_INT_H
#include "hw.h"
#include "audiodev.h"
#include "hw/hw.h"
#include "hw/audio/audio.h"
#include "audio/audio.h"
#include "pci/pci.h"
#include "hw/pci/pci.h"
#include "sysemu/dma.h"
enum {
@ -53,7 +53,7 @@ typedef struct AC97BusMasterRegs {
typedef struct AC97LinkState {
qemu_irq irq;
DMAContext *dma;
AddressSpace *as;
QEMUSoundCard card;
uint32_t glob_cnt;
@ -73,7 +73,7 @@ typedef struct AC97LinkState {
void ac97_common_init (AC97LinkState *s,
qemu_irq irq,
DMAContext *dma);
AddressSpace *as);
extern const MemoryRegionOps ac97_io_nam_ops;

25
hw/i386/chihiro.c
View File

@ -21,7 +21,7 @@
#include "hw/boards.h"
#include "hw/ide.h"
#include "hw/loader.h"
#include "hw/isa.h"
#include "hw/isa/isa.h"
#include "exec/memory.h"
#include "qemu/config-file.h"
#include "sysemu/blockdev.h"
@ -80,22 +80,20 @@ static const MemoryRegionOps chihiro_lpc_io_ops = {
},
};
static int chihiro_lpc_initfn(ISADevice *dev)
static void chihiro_lpc_realize(DeviceState *dev, Error **errp)
{
ChihiroLPCState *s = CHIHIRO_LPC_DEVICE(dev);
ISADevice *isa = ISA_DEVICE(dev);
memory_region_init_io(&s->ioport, &chihiro_lpc_io_ops, s,
memory_region_init_io(&s->ioport, OBJECT(dev), &chihiro_lpc_io_ops, s,
"chihiro-lpc-io", 0x100);
isa_register_ioport(dev, &s->ioport, 0x4000);
return 0;
isa_register_ioport(isa, &s->ioport, 0x4000);
}
static void chihiro_lpc_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
ic->init = chihiro_lpc_initfn;
dc->realize = chihiro_lpc_realize;
dc->desc = "Chihiro LPC";
}
@ -139,11 +137,11 @@ static void chihiro_ide_interface_init(const char *rom_file,
MemoryRegion *interface, *rom, *filesystem;
interface = g_malloc(sizeof(*interface));
memory_region_init(interface, "chihiro.interface",
memory_region_init(interface, NULL, "chihiro.interface",
(uint64_t)0x10000000 * SECTOR_SIZE);
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, "chihiro.interface.rom",
memory_region_init_ram(rom, NULL, "chihiro.interface.rom",
ROM_SECTORS * SECTOR_SIZE);
memory_region_add_subregion(interface,
(uint64_t)ROM_START * SECTOR_SIZE, rom);
@ -151,7 +149,7 @@ static void chihiro_ide_interface_init(const char *rom_file,
/* limited by the size of the board ram, which we emulate as 128M for now */
filesystem = g_malloc(sizeof(*filesystem));
memory_region_init_ram(filesystem, "chihiro.interface.filesystem",
memory_region_init_ram(filesystem, NULL, "chihiro.interface.filesystem",
128 * 1024 * 1024);
memory_region_add_subregion(interface,
(uint64_t)FILESYSTEM_START * SECTOR_SIZE,
@ -160,7 +158,7 @@ static void chihiro_ide_interface_init(const char *rom_file,
AddressSpace *interface_space;
interface_space = g_malloc(sizeof(*interface_space));
address_space_init(interface_space, interface);
address_space_init(interface_space, interface, "chihiro-interface");
/* read files */
int rc, fd = -1;
@ -264,8 +262,7 @@ static void chihiro_init(QEMUMachineInitArgs *args)
ISABus *isa_bus;
xbox_init_common(args, (uint8_t*)eeprom, &isa_bus);
ISADevice *dev = isa_create(isa_bus, "chihiro-lpc");
qdev_init_nofail(&dev->qdev);
isa_create_simple(isa_bus, "chihiro-lpc");
}

27
hw/i386/xbox.c
View File

@ -22,16 +22,17 @@
#include "hw/hw.h"
#include "sysemu/arch_init.h"
#include "hw/pc.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "hw/boards.h"
#include "hw/ide.h"
#include "hw/mc146818rtc.h"
#include "hw/i8254.h"
#include "hw/pcspk.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/timer/i8254.h"
#include "hw/audio/pcspk.h"
#include "sysemu/sysemu.h"
#include "hw/cpu/icc_bus.h"
#include "hw/sysbus.h"
#include "hw/smbus.h"
#include "hw/i2c/smbus.h"
#include "sysemu/blockdev.h"
#include "hw/loader.h"
#include "exec/address-spaces.h"
@ -64,7 +65,7 @@ static void xbox_memory_init(MemoryRegion *system_memory,
* with older qemus that used qemu_ram_alloc().
*/
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, "xbox.ram", mem_size);
memory_region_init_ram(ram, NULL, "xbox.ram", mem_size);
vmstate_register_ram_global(ram);
*ram_memory = ram;
memory_region_add_subregion(system_memory, 0, ram);
@ -88,7 +89,7 @@ static void xbox_memory_init(MemoryRegion *system_memory,
goto bios_error;
}
bios = g_malloc(sizeof(*bios));
memory_region_init_ram(bios, "xbox.bios", bios_size);
memory_region_init_ram(bios, NULL, "xbox.bios", bios_size);
vmstate_register_ram_global(bios);
memory_region_set_readonly(bios, true);
ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1);
@ -105,7 +106,7 @@ bios_error:
/* map the bios repeated at the top of memory */
for (map_loc=(uint32_t)(-bios_size); map_loc >= 0xff000000; map_loc-=bios_size) {
map_bios = g_malloc(sizeof(*map_bios));
memory_region_init_alias(map_bios, NULL, bios, 0, bios_size);
memory_region_init_alias(map_bios, NULL, NULL, bios, 0, bios_size);
memory_region_add_subregion(rom_memory, map_loc, map_bios);
memory_region_set_readonly(map_bios, true);
@ -147,10 +148,16 @@ void xbox_init_common(QEMUMachineInitArgs *args,
i2c_bus *smbus;
PCIBus *agp_bus;
pc_cpus_init(cpu_model);
DeviceState *icc_bridge;
icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
object_property_add_child(qdev_get_machine(), "icc-bridge",
OBJECT(icc_bridge), NULL);
pc_cpus_init(cpu_model, icc_bridge);
pci_memory = g_new(MemoryRegion, 1);
memory_region_init(pci_memory, "pci", INT64_MAX);
memory_region_init(pci_memory, NULL, "pci", INT64_MAX);
/* allocate ram and load rom/bios */
xbox_memory_init(get_system_memory(), ram_size,

2
hw/ide/core.c
View File

@ -1373,7 +1373,7 @@ static bool cmd_security_unlock(IDEState *s, uint8_t cmd)
s->status = READY_STAT | SEEK_STAT;
ide_transfer_start(s, s->io_buffer, 512,
ide_security_cmd);
break;
return false;
}

21
hw/lpc47m157.c
View File

@ -17,7 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw/isa.h"
#include "hw/isa/isa.h"
#define ENTER_CONFIG_KEY 0x55
@ -124,30 +124,25 @@ static const MemoryRegionOps lpc47m157_io_ops = {
},
};
static int lpc47m157_init(ISADevice *dev)
static void lpc47m157_realize(DeviceState *dev, Error **errp)
{
LPC47M157State *s;
ISABus *bus;
s = LPC47M157_DEVICE(dev);
bus = isa_bus_from_device(dev);
LPC47M157State *s = LPC47M157_DEVICE(dev);
ISADevice *isa = ISA_DEVICE(dev);
const uint32_t iobase = 0x2e; //0x4e if SYSOPT pin, make it a property
s->config_regs[CONFIG_PORT_LOW] = iobase & 0xFF;
s->config_regs[CONFIG_PORT_HIGH] = iobase >> 8;
memory_region_init_io(&s->io, &lpc47m157_io_ops, s, "lpc47m157", 2);
isa_register_ioport(dev, &s->io, iobase);
return 0;
memory_region_init_io(&s->io, OBJECT(s),
&lpc47m157_io_ops, s, "lpc47m157", 2);
isa_register_ioport(isa, &s->io, iobase);
}
static void lpc47m157_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
ic->init = lpc47m157_init;
dc->realize = lpc47m157_realize;
//dc->reset = pc87312_reset;
//dc->vmsd = &vmstate_pc87312;
//dc->props = pc87312_properties;

18
hw/mcpx_aci.c
View File

@ -16,12 +16,12 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "pci/pci.h"
#include "ac97_int.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "hw/audio/ac97_int.h"
#include "mcpx_apu.h"
#include "hw/mcpx_apu.h"
typedef struct MCPXACIState {
PCIDevice dev;
@ -46,11 +46,11 @@ static int mcpx_aci_initfn(PCIDevice *dev)
MCPXACIState *d = MCPX_ACI_DEVICE(dev);
//mmio
memory_region_init(&d->mmio, "mcpx-aci-mmio", 0x1000);
memory_region_init(&d->mmio, OBJECT(dev), "mcpx-aci-mmio", 0x1000);
memory_region_init_io(&d->io_nam, &ac97_io_nam_ops, &d->ac97,
memory_region_init_io(&d->io_nam, OBJECT(dev), &ac97_io_nam_ops, &d->ac97,
"mcpx-aci-nam", 0x100);
memory_region_init_io(&d->io_nabm, &ac97_io_nabm_ops, &d->ac97,
memory_region_init_io(&d->io_nabm, OBJECT(dev), &ac97_io_nabm_ops, &d->ac97,
"mcpx-aci-nabm", 0x80);
/*pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->io_nam);
@ -67,7 +67,7 @@ static int mcpx_aci_initfn(PCIDevice *dev)
pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
ac97_common_init(&d->ac97, d->irq, pci_dma_context(&d->dev));
ac97_common_init(&d->ac97, d->irq, pci_get_address_space(&d->dev));
return 0;
}

14
hw/mcpx_apu.c
View File

@ -16,11 +16,11 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "pci/pci.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "mcpx_apu.h"
#include "hw/mcpx_apu.h"
@ -417,14 +417,14 @@ static int mcpx_apu_initfn(PCIDevice *dev)
{
MCPXAPUState *d = MCPX_APU_DEVICE(dev);
memory_region_init_io(&d->mmio, &mcpx_apu_mmio_ops, d,
memory_region_init_io(&d->mmio, OBJECT(dev), &mcpx_apu_mmio_ops, d,
"mcpx-apu-mmio", 0x80000);
memory_region_init_io(&d->vp.mmio, &vp_ops, d,
memory_region_init_io(&d->vp.mmio, OBJECT(dev), &vp_ops, d,
"mcpx-apu-vp", 0x10000);
memory_region_add_subregion(&d->mmio, 0x20000, &d->vp.mmio);
memory_region_init_io(&d->gp.mmio, &gp_ops, d,
memory_region_init_io(&d->gp.mmio, OBJECT(dev), &gp_ops, d,
"mcpx-apu-gp", 0x10000);
memory_region_add_subregion(&d->mmio, 0x30000, &d->gp.mmio);

2
hw/mcpx_apu.h
View File

@ -20,7 +20,7 @@
#ifndef HW_MCPX_APU_H
#define HW_MCPX_APU_H
#include "pci/pci.h"
#include "hw/pci/pci.h"
void mcpx_apu_init(PCIBus *bus, int devfn, qemu_irq irq);
void mcpx_aci_init(PCIBus *bus, int devfn, qemu_irq irq);

67
hw/nv2a.c
View File

@ -16,20 +16,20 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "ui/console.h"
#include "pci/pci.h"
#include "vga.h"
#include "vga_int.h"
#include "hw/pci/pci.h"
#include "hw/display/vga.h"
#include "hw/display/vga_int.h"
#include "qemu/queue.h"
#include "qemu/thread.h"
#include "qapi/qmp/qstring.h"
#include "gl/gloffscreen.h"
#include "u_format_r11g11b10f.h"
#include "hw/u_format_r11g11b10f.h"
#include "nv2a_vsh.h"
#include "hw/nv2a_vsh.h"
#ifdef __APPLE__
#include <OpenGL/gl.h>
@ -41,7 +41,7 @@
#include <GL/gl.h>
#endif
#include "nv2a.h"
#include "hw/nv2a.h"
#define DEBUG_NV2A
#ifdef DEBUG_NV2A
@ -834,6 +834,7 @@ typedef struct NV2AState {
qemu_irq irq;
VGACommonState vga;
GraphicHwOps hw_ops;
MemoryRegion *vram;
MemoryRegion vram_pci;
@ -3698,36 +3699,15 @@ static void nv2a_get_offsets(VGACommonState *s,
}
/* Graphic console methods. Need to wrap all of these since
* graphic_console_init takes a single opaque, and we
* need access to the nv2a state to set the vblank interrupt */
static void nv2a_vga_update(void *opaque)
static void nv2a_vga_gfx_update(void *opaque)
{
NV2AState *d = NV2A_DEVICE(opaque);
d->vga.update(&d->vga);
VGACommonState *vga = opaque;
vga->hw_ops->gfx_update(vga);
NV2AState *d = container_of(vga, NV2AState, vga);
d->pcrtc.pending_interrupts |= NV_PCRTC_INTR_0_VBLANK;
update_irq(d);
}
static void nv2a_vga_invalidate(void *opaque)
{
NV2AState *d = NV2A_DEVICE(opaque);
d->vga.invalidate(&d->vga);
}
static void nv2a_vga_screen_dump(void *opaque,
const char *filename,
bool cswitch,
Error **errp)
{
NV2AState *d = NV2A_DEVICE(opaque);
d->vga.screen_dump(&d->vga, filename, cswitch, errp);
}
static void nv2a_vga_text_update(void *opaque, console_ch_t *chardata)
{
NV2AState *d = NV2A_DEVICE(opaque);
d->vga.text_update(&d->vga, chardata);
}
static void nv2a_init_memory(NV2AState *d, MemoryRegion *ram)
{
@ -3735,13 +3715,13 @@ static void nv2a_init_memory(NV2AState *d, MemoryRegion *ram)
d->vram = ram;
/* PCI exposed vram */
memory_region_init_alias(&d->vram_pci, "nv2a-vram-pci", d->vram,
memory_region_init_alias(&d->vram_pci, OBJECT(d), "nv2a-vram-pci", d->vram,
0, memory_region_size(d->vram));
pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, &d->vram_pci);
/* RAMIN - should be in vram somewhere, but not quite sure where atm */
memory_region_init_ram(&d->ramin, "nv2a-ramin", 0x100000);
memory_region_init_ram(&d->ramin, OBJECT(d), "nv2a-ramin", 0x100000);
/* memory_region_init_alias(&d->ramin, "nv2a-ramin", &d->vram,
memory_region_size(&d->vram) - 0x100000,
0x100000); */
@ -3754,7 +3734,7 @@ static void nv2a_init_memory(NV2AState *d, MemoryRegion *ram)
/* hacky. swap out vga's vram */
memory_region_destroy(&d->vga.vram);
memory_region_init_alias(&d->vga.vram, "vga.vram",
memory_region_init_alias(&d->vga.vram, OBJECT(d), "vga.vram",
d->vram, 0, memory_region_size(d->vram));
d->vga.vram_ptr = memory_region_get_ram_ptr(&d->vga.vram);
vga_dirty_log_start(&d->vga);
@ -3782,24 +3762,23 @@ static int nv2a_initfn(PCIDevice *dev)
/* seems to start in color mode */
vga->msr = VGA_MIS_COLOR;
vga_common_init(vga);
vga_common_init(vga, OBJECT(dev));
vga->get_bpp = nv2a_get_bpp;
vga->get_offsets = nv2a_get_offsets;
vga->ds = graphic_console_init(nv2a_vga_update,
nv2a_vga_invalidate,
nv2a_vga_screen_dump,
nv2a_vga_text_update,
d);
d->hw_ops = *vga->hw_ops;
d->hw_ops.gfx_update = nv2a_vga_gfx_update;
vga->con = graphic_console_init(DEVICE(dev), &d->hw_ops, vga);
/* mmio */
memory_region_init(&d->mmio, "nv2a-mmio", 0x1000000);
memory_region_init(&d->mmio, OBJECT(dev), "nv2a-mmio", 0x1000000);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
for (i=0; i<sizeof(blocktable)/sizeof(blocktable[0]); i++) {
if (!blocktable[i].name) continue;
memory_region_init_io(&d->block_mmio[i], &blocktable[i].ops, d,
memory_region_init_io(&d->block_mmio[i], OBJECT(dev),
&blocktable[i].ops, d,
blocktable[i].name, blocktable[i].size);
memory_region_add_subregion(&d->mmio, blocktable[i].offset,
&d->block_mmio[i]);

2
hw/nv2a_vsh.c
View File

@ -29,7 +29,7 @@
#include <stdbool.h>
#include <assert.h>
#include "nv2a_vsh.h"
#include "hw/nv2a_vsh.h"
#define VSH_TOKEN_SIZE 4

14
hw/nvnet.c
View File

@ -16,11 +16,11 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "pc.h"
#include "pci/pci.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "nvnet.h"
#include "hw/nvnet.h"
#define IOPORT_SIZE 0x8
@ -82,10 +82,12 @@ static int nvnet_initfn(PCIDevice *dev)
{
NVNetState *d = NVNET_DEVICE(dev);
memory_region_init_io(&d->mmio, &nvnet_mmio_ops, d, "nvnet-mmio", MMIO_SIZE);
memory_region_init_io(&d->mmio, OBJECT(dev),
&nvnet_mmio_ops, d, "nvnet-mmio", MMIO_SIZE);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
memory_region_init_io(&d->io, &nvnet_io_ops, d, "nvnet-io", IOPORT_SIZE);
memory_region_init_io(&d->io, OBJECT(dev),
&nvnet_io_ops, d, "nvnet-io", IOPORT_SIZE);
pci_register_bar(&d->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->io);
return 0;

2
hw/nvnet.h
View File

@ -20,7 +20,7 @@
#ifndef HW_NVNET_H
#define HW_NVNET_H
#include "pci/pci.h"
#include "hw/pci/pci.h"
void nvnet_init(PCIBus *bus, int devfn, qemu_irq irq);

6
hw/smbus_adm1032.c
View File

@ -22,9 +22,9 @@
* THE SOFTWARE.
*/
#include "hw.h"
#include "i2c.h"
#include "smbus.h"
#include "hw/hw.h"
#include "hw/i2c/i2c.h"
#include "hw/i2c/smbus.h"
#define DEBUG

6
hw/smbus_cx25871.c
View File

@ -17,9 +17,9 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "i2c.h"
#include "smbus.h"
#include "hw/hw.h"
#include "hw/i2c/i2c.h"
#include "hw/i2c/smbus.h"
typedef struct SMBusCX25871Device {
SMBusDevice smbusdev;

6
hw/smbus_xbox_smc.c
View File

@ -17,9 +17,9 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "i2c.h"
#include "smbus.h"
#include "hw/hw.h"
#include "hw/i2c/i2c.h"
#include "hw/i2c/smbus.h"
/*
* Hardware is a PIC16LC

41
hw/xbox_pci.c
View File

@ -16,23 +16,23 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#include "hw/hw.h"
#include "qemu/range.h"
#include "isa.h"
#include "sysbus.h"
#include "loader.h"
#include "hw/isa/isa.h"
#include "hw/sysbus.h"
#include "hw/loader.h"
#include "qemu/config-file.h"
#include "pc.h"
#include "pci/pci.h"
#include "pci/pci_bus.h"
#include "pci/pci_bridge.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_bridge.h"
#include "exec/address-spaces.h"
#include "acpi_xbox.h"
#include "amd_smbus.h"
#include "hw/acpi_xbox.h"
#include "hw/amd_smbus.h"
#include "qemu-common.h"
#include "xbox_pci.h"
#include "hw/xbox_pci.h"
/*
@ -79,7 +79,7 @@ PCIBus *xbox_pci_init(qemu_irq *pic,
host_state = PCI_HOST_BRIDGE(dev);
host_bus = pci_bus_new(dev, NULL,
pci_memory, address_space_io, 0);
pci_memory, address_space_io, 0, TYPE_PCI_BUS);
host_state->bus = host_bus;
//pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3,
@ -95,7 +95,8 @@ PCIBus *xbox_pci_init(qemu_irq *pic,
bridge_state->system_memory = address_space_mem;
/* PCI hole */
memory_region_init_alias(&bridge_state->pci_hole, "pci-hole",
memory_region_init_alias(&bridge_state->pci_hole, OBJECT(bridge),
"pci-hole",
bridge_state->pci_address_space,
ram_size,
0x100000000ULL - ram_size);
@ -119,7 +120,7 @@ PCIBus *xbox_agp_init(PCIBus *bus)
return NULL;
}
br = DO_UPCAST(PCIBridge, dev, d);
br = PCI_BRIDGE(d);
//qdev = &br->dev.qdev;
//qdev_init_nofail(qdev);
@ -197,7 +198,7 @@ static int xbox_smbus_initfn(PCIDevice *dev)
{
XBOX_SMBState *s = XBOX_SMBUS_DEVICE(dev);
memory_region_init_io(&s->smb_bar, &xbox_smbus_ops,
memory_region_init_io(&s->smb_bar, OBJECT(dev), &xbox_smbus_ops,
s, "xbox-smbus-bar", 32);
pci_register_bar(dev, XBOX_SMBUS_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
&s->smb_bar);
@ -386,7 +387,7 @@ static int xbox_agp_initfn(PCIDevice *d)
{
pci_set_word(d->config + PCI_PREF_MEMORY_BASE, PCI_PREF_RANGE_TYPE_32);
pci_set_word(d->config + PCI_PREF_MEMORY_LIMIT, PCI_PREF_RANGE_TYPE_32);
return pci_bridge_initfn(d);
return pci_bridge_initfn(d, TYPE_PCI_BUS);
}
static void xbox_agp_class_init(ObjectClass *klass, void *data)
@ -408,7 +409,7 @@ static void xbox_agp_class_init(ObjectClass *klass, void *data)
static const TypeInfo xbox_agp_info = {
.name = "xbox-agp",
.parent = TYPE_PCI_DEVICE,
.parent = TYPE_PCI_BRIDGE,
.instance_size = sizeof(PCIBridge),
.class_init = xbox_agp_class_init,
};
@ -458,12 +459,14 @@ static int xbox_pcihost_initfn(SysBusDevice *dev)
{
PCIHostState *s = PCI_HOST_BRIDGE(dev);
memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s,
memory_region_init_io(&s->conf_mem, OBJECT(dev),
&pci_host_conf_le_ops, s,
"pci-conf-idx", 4);
sysbus_add_io(dev, CONFIG_ADDR, &s->conf_mem);
sysbus_init_ioports(&s->busdev, CONFIG_ADDR, 4);
memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s,
memory_region_init_io(&s->data_mem, OBJECT(dev),
&pci_host_data_le_ops, s,
"pci-conf-data", 4);
sysbus_add_io(dev, CONFIG_DATA, &s->data_mem);
sysbus_init_ioports(&s->busdev, CONFIG_DATA, 4);

16
hw/xbox_pci.h
View File

@ -22,14 +22,14 @@
#ifndef HW_XBOX_PCI_H
#define HW_XBOX_PCI_H
#include "hw.h"
#include "isa.h"
#include "pci/pci.h"
#include "pci/pci_host.h"
#include "pci/pci_bus.h"
#include "amd_smbus.h"
#include "acpi.h"
#include "acpi_xbox.h"
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
#include "hw/pci/pci_bus.h"
#include "hw/amd_smbus.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi_xbox.h"
typedef struct XBOX_PCIState {