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target/i386: Remove LBREn bit check when access Arch LBR MSRs 

Live migration can happen when Arch LBR LBREn bit is cleared,
e.g., when migration happens after guest entered SMM mode.
In this case, we still need to migrate Arch LBR MSRs.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220517155024.33270-1-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Yang Weijiang 2022-05-17 11:50:24 -04:00 committed by Paolo Bonzini
parent 3757b0d08b
commit 3a7a27cffb
1 changed files with 9 additions and 12 deletions
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21
target/i386/kvm/kvm.c
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@ -3373,15 +3373,14 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
int i, ret; int i, ret;
/* /*
* Only migrate Arch LBR states when: 1) Arch LBR is enabled * Only migrate Arch LBR states when the host Arch LBR depth
* for migrated vcpu. 2) the host Arch LBR depth equals that * equals that of source guest's, this is to avoid mismatch
* of source guest's, this is to avoid mismatch of guest/host * of guest/host config for the msr hence avoid unexpected
* config for the msr hence avoid unexpected misbehavior. * misbehavior.
*/ */
ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth); ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
if (ret == 1 && (env->msr_lbr_ctl & 0x1) && !!depth && if (ret == 1 && !!depth && depth == env->msr_lbr_depth) {
depth == env->msr_lbr_depth) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, env->msr_lbr_ctl); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, env->msr_lbr_ctl);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, env->msr_lbr_depth); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, env->msr_lbr_depth);
@ -3801,13 +3800,11 @@ static int kvm_get_msrs(X86CPU *cpu)
if (kvm_enabled() && cpu->enable_pmu && if (kvm_enabled() && cpu->enable_pmu &&
(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) { (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
uint64_t ctl, depth; uint64_t depth;
int i, ret2; int i, ret;
ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_CTL, &ctl); ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
ret2 = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth); if (ret == 1 && depth == ARCH_LBR_NR_ENTRIES) {
if (ret == 1 && ret2 == 1 && (ctl & 0x1) &&
depth == ARCH_LBR_NR_ENTRIES) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, 0); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, 0);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, 0); kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, 0);