From 3949f4675d13c587078f8f423845a3a537a22595 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 4 Sep 2019 12:30:19 -0700 Subject: [PATCH] target/arm: Diagnose writeback register in list for LDM for v7 Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN value back to the base register. Starting in v7 this is UNPREDICTABLE. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20190904193059.26202-30-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index 1f3c7bbd54..b67e7389d3 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9997,6 +9997,15 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a) static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a) { + /* + * Writeback register in register list is UNPREDICTABLE + * for ArchVersion() >= 7. Prior to v7, A32 would write + * an UNKNOWN value to the base register. + */ + if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) { + unallocated_encoding(s); + return true; + } return do_ldm(s, a); }