mirror of https://github.com/xemu-project/xemu.git
ipmi: Add an SMBus IPMI interface
Signed-off-by: Corey Minyard <cminyard@mvista.com>
This commit is contained in:
Corey Minyard
parent
12f983c6aa
commit
38033052f6
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@ -12,6 +12,7 @@
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#CONFIG_ISA_IPMI_KCS=n
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#CONFIG_PCI_IPMI_KCS=n
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#CONFIG_PCI_IPMI_BT=n
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#CONFIG_IPMI_SSIF=n
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#CONFIG_PCI_DEVICES=n
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#CONFIG_PVPANIC=n
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#CONFIG_QXL=n
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@ -10,6 +10,7 @@ config PC
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imply ISA_IPMI_BT
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imply PCI_IPMI_KCS
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imply PCI_IPMI_BT
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imply IPMI_SSIF
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imply ISA_DEBUG
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imply PARALLEL
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imply PCI_DEVICES
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@ -30,3 +30,8 @@ config PCI_IPMI_BT
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bool
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depends on PCI
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select IPMI
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config IPMI_SSIF
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bool
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depends on I2C
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select IPMI
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@ -5,3 +5,4 @@ common-obj-$(CONFIG_ISA_IPMI_KCS) += isa_ipmi_kcs.o
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common-obj-$(CONFIG_PCI_IPMI_KCS) += pci_ipmi_kcs.o
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common-obj-$(CONFIG_ISA_IPMI_BT) += isa_ipmi_bt.o
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common-obj-$(CONFIG_PCI_IPMI_BT) += pci_ipmi_bt.o
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common-obj-$(CONFIG_IPMI_SSIF) += smbus_ipmi.o
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@ -0,0 +1,384 @@
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/*
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* QEMU IPMI SMBus (SSIF) emulation
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*
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* Copyright (c) 2015,2016 Corey Minyard, MontaVista Software, LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "migration/vmstate.h"
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#include "hw/i2c/smbus_slave.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "hw/ipmi/ipmi.h"
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#define TYPE_SMBUS_IPMI "smbus-ipmi"
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#define SMBUS_IPMI(obj) OBJECT_CHECK(SMBusIPMIDevice, (obj), TYPE_SMBUS_IPMI)
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#define SSIF_IPMI_REQUEST 2
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#define SSIF_IPMI_MULTI_PART_REQUEST_START 6
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#define SSIF_IPMI_MULTI_PART_REQUEST_MIDDLE 7
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#define SSIF_IPMI_MULTI_PART_REQUEST_END 8
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#define SSIF_IPMI_RESPONSE 3
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#define SSIF_IPMI_MULTI_PART_RESPONSE_MIDDLE 9
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#define SSIF_IPMI_MULTI_PART_RETRY 0xa
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#define MAX_SSIF_IPMI_MSG_SIZE 255
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#define MAX_SSIF_IPMI_MSG_CHUNK 32
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#define IPMI_GET_SYS_INTF_CAP_CMD 0x57
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typedef struct SMBusIPMIDevice {
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SMBusDevice parent;
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IPMIBmc *bmc;
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uint8_t outmsg[MAX_SSIF_IPMI_MSG_SIZE];
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uint32_t outlen;
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uint32_t currblk;
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/* Holds the SMBUS message currently being sent to the host. */
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uint8_t outbuf[MAX_SSIF_IPMI_MSG_CHUNK + 1]; /* len + message. */
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uint32_t outpos;
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uint8_t inmsg[MAX_SSIF_IPMI_MSG_SIZE];
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uint32_t inlen;
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/*
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* This is a response number that we send with the command to make
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* sure that the response matches the command.
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*/
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uint8_t waiting_rsp;
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uint32_t uuid;
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} SMBusIPMIDevice;
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static void smbus_ipmi_handle_event(IPMIInterface *ii)
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{
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/* No interrupts, so nothing to do here. */
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}
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static void smbus_ipmi_handle_rsp(IPMIInterface *ii, uint8_t msg_id,
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unsigned char *rsp, unsigned int rsp_len)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(ii);
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if (sid->waiting_rsp == msg_id) {
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sid->waiting_rsp++;
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if (rsp_len > MAX_SSIF_IPMI_MSG_SIZE) {
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rsp[2] = IPMI_CC_REQUEST_DATA_TRUNCATED;
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rsp_len = MAX_SSIF_IPMI_MSG_SIZE;
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}
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memcpy(sid->outmsg, rsp, rsp_len);
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sid->outlen = rsp_len;
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sid->outpos = 0;
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sid->currblk = 0;
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}
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}
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static void smbus_ipmi_set_atn(IPMIInterface *ii, int val, int irq)
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{
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/* This is where PEC would go. */
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}
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static void smbus_ipmi_set_irq_enable(IPMIInterface *ii, int val)
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{
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}
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static void smbus_ipmi_send_msg(SMBusIPMIDevice *sid)
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{
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uint8_t *msg = sid->inmsg;
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uint32_t len = sid->inlen;
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IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(sid->bmc);
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sid->outlen = 0;
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sid->outpos = 0;
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sid->currblk = 0;
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if (msg[0] == (IPMI_NETFN_APP << 2) && msg[1] == IPMI_GET_SYS_INTF_CAP_CMD)
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{
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/* We handle this ourself. */
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sid->outmsg[0] = (IPMI_NETFN_APP + 1) << 2;
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sid->outmsg[1] = msg[1];
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if (len < 3) {
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sid->outmsg[2] = IPMI_CC_REQUEST_DATA_LENGTH_INVALID;
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sid->outlen = 3;
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} else if ((msg[2] & 0x0f) != 0) {
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sid->outmsg[2] = IPMI_CC_INVALID_DATA_FIELD;
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sid->outlen = 3;
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} else {
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sid->outmsg[2] = 0;
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sid->outmsg[3] = 0;
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sid->outmsg[4] = (2 << 6); /* Multi-part supported. */
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sid->outmsg[5] = MAX_SSIF_IPMI_MSG_SIZE;
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sid->outmsg[6] = MAX_SSIF_IPMI_MSG_SIZE;
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sid->outlen = 7;
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}
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return;
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}
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bk->handle_command(sid->bmc, sid->inmsg, sid->inlen, sizeof(sid->inmsg),
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sid->waiting_rsp);
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}
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static uint8_t ipmi_receive_byte(SMBusDevice *dev)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(dev);
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if (sid->outpos >= sizeof(sid->outbuf)) {
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return 0xff;
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}
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return sid->outbuf[sid->outpos++];
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}
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static int ipmi_load_readbuf(SMBusIPMIDevice *sid)
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{
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unsigned int block = sid->currblk, pos, len;
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if (sid->outlen == 0) {
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return -1;
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}
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if (sid->outlen <= 32) {
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if (block != 0) {
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return -1;
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}
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sid->outbuf[0] = sid->outlen;
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memcpy(sid->outbuf + 1, sid->outmsg, sid->outlen);
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sid->outpos = 0;
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return 0;
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}
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if (block == 0) {
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sid->outbuf[0] = 32;
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sid->outbuf[1] = 0;
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sid->outbuf[2] = 1;
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memcpy(sid->outbuf + 3, sid->outmsg, 30);
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sid->outpos = 0;
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return 0;
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}
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/*
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* Calculate the position in outmsg. 30 for the first block, 31
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* for the rest of the blocks.
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*/
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pos = 30 + (block - 1) * 31;
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if (pos >= sid->outlen) {
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return -1;
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}
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len = sid->outlen - pos;
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if (len > 31) {
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/* More chunks after this. */
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len = 31;
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/* Blocks start at 0 for the first middle transaction. */
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sid->outbuf[1] = block - 1;
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} else {
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sid->outbuf[1] = 0xff; /* End of message marker. */
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}
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sid->outbuf[0] = len + 1;
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memcpy(sid->outbuf + 2, sid->outmsg + pos, len);
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sid->outpos = 0;
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return 0;
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}
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static int ipmi_write_data(SMBusDevice *dev, uint8_t *buf, uint8_t len)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(dev);
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bool send = false;
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uint8_t cmd;
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int ret = 0;
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/* length is guaranteed to be >= 1. */
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cmd = *buf++;
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len--;
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/* Handle read request, which don't have any data in the write part. */
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switch (cmd) {
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case SSIF_IPMI_RESPONSE:
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sid->currblk = 0;
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ret = ipmi_load_readbuf(sid);
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break;
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case SSIF_IPMI_MULTI_PART_RESPONSE_MIDDLE:
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sid->currblk++;
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ret = ipmi_load_readbuf(sid);
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break;
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case SSIF_IPMI_MULTI_PART_RETRY:
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if (len >= 1) {
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sid->currblk = buf[0];
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ret = ipmi_load_readbuf(sid);
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} else {
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ret = -1;
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}
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break;
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default:
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break;
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}
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/* This should be a message write, make the length is there and correct. */
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if (len >= 1) {
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if (*buf != len - 1 || *buf > MAX_SSIF_IPMI_MSG_CHUNK) {
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return -1; /* Bogus message */
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}
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buf++;
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len--;
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}
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switch (cmd) {
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case SSIF_IPMI_REQUEST:
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send = true;
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/* FALLTHRU */
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case SSIF_IPMI_MULTI_PART_REQUEST_START:
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if (len < 2) {
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return -1; /* Bogus. */
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}
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memcpy(sid->inmsg, buf, len);
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sid->inlen = len;
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break;
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case SSIF_IPMI_MULTI_PART_REQUEST_END:
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send = true;
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/* FALLTHRU */
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case SSIF_IPMI_MULTI_PART_REQUEST_MIDDLE:
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if (!sid->inlen) {
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return -1; /* Bogus. */
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}
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if (sid->inlen + len > MAX_SSIF_IPMI_MSG_SIZE) {
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sid->inlen = 0; /* Discard the message. */
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return -1; /* Bogus. */
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}
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if (len < 32) {
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/*
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* Special hack, a multi-part middle that is less than 32 bytes
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* marks the end of a message. The specification is fairly
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* confusing, so some systems to this, even sending a zero
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* length end message to mark the end.
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*/
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send = true;
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}
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memcpy(sid->inmsg + sid->inlen, buf, len);
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sid->inlen += len;
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break;
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}
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if (send && sid->inlen) {
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smbus_ipmi_send_msg(sid);
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}
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return ret;
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}
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static const VMStateDescription vmstate_smbus_ipmi = {
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.name = TYPE_SMBUS_IPMI,
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_SMBUS_DEVICE(parent, SMBusIPMIDevice),
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VMSTATE_UINT8(waiting_rsp, SMBusIPMIDevice),
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VMSTATE_UINT32(outlen, SMBusIPMIDevice),
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VMSTATE_UINT32(currblk, SMBusIPMIDevice),
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VMSTATE_UINT8_ARRAY(outmsg, SMBusIPMIDevice, MAX_SSIF_IPMI_MSG_SIZE),
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VMSTATE_UINT32(outpos, SMBusIPMIDevice),
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VMSTATE_UINT8_ARRAY(outbuf, SMBusIPMIDevice,
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MAX_SSIF_IPMI_MSG_CHUNK + 1),
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VMSTATE_UINT32(inlen, SMBusIPMIDevice),
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VMSTATE_UINT8_ARRAY(inmsg, SMBusIPMIDevice, MAX_SSIF_IPMI_MSG_SIZE),
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VMSTATE_END_OF_LIST()
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}
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};
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static void smbus_ipmi_realize(DeviceState *dev, Error **errp)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(dev);
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IPMIInterface *ii = IPMI_INTERFACE(dev);
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if (!sid->bmc) {
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error_setg(errp, "IPMI device requires a bmc attribute to be set");
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return;
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}
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sid->uuid = ipmi_next_uuid();
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sid->bmc->intf = ii;
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}
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static void smbus_ipmi_init(Object *obj)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(obj);
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ipmi_bmc_find_and_link(OBJECT(obj), (Object **) &sid->bmc);
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}
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static void smbus_ipmi_get_fwinfo(struct IPMIInterface *ii, IPMIFwInfo *info)
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{
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SMBusIPMIDevice *sid = SMBUS_IPMI(ii);
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info->interface_name = "smbus";
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info->interface_type = IPMI_SMBIOS_SSIF;
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info->ipmi_spec_major_revision = 2;
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info->ipmi_spec_minor_revision = 0;
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info->i2c_slave_address = sid->bmc->slave_addr;
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info->base_address = sid->parent.i2c.address;
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info->memspace = IPMI_MEMSPACE_SMBUS;
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info->register_spacing = 1;
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info->uuid = sid->uuid;
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}
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static void smbus_ipmi_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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IPMIInterfaceClass *iic = IPMI_INTERFACE_CLASS(oc);
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SMBusDeviceClass *sc = SMBUS_DEVICE_CLASS(oc);
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sc->receive_byte = ipmi_receive_byte;
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sc->write_data = ipmi_write_data;
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dc->vmsd = &vmstate_smbus_ipmi;
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dc->realize = smbus_ipmi_realize;
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iic->set_atn = smbus_ipmi_set_atn;
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iic->handle_rsp = smbus_ipmi_handle_rsp;
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iic->handle_if_event = smbus_ipmi_handle_event;
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iic->set_irq_enable = smbus_ipmi_set_irq_enable;
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iic->get_fwinfo = smbus_ipmi_get_fwinfo;
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}
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static const TypeInfo smbus_ipmi_info = {
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.name = TYPE_SMBUS_IPMI,
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.parent = TYPE_SMBUS_DEVICE,
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.instance_size = sizeof(SMBusIPMIDevice),
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.instance_init = smbus_ipmi_init,
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.class_init = smbus_ipmi_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_IPMI_INTERFACE },
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{ }
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}
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};
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static void smbus_ipmi_register_types(void)
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{
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type_register_static(&smbus_ipmi_info);
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}
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type_init(smbus_ipmi_register_types)
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