mirror of https://github.com/xemu-project/xemu.git
hw/pvrdma: Add support for SRQ
Implement the pvrdma device commands for supporting SRQ Signed-off-by: Kamal Heib <kamalheib1@gmail.com> Message-Id: <20190403113343.26384-5-kamalheib1@gmail.com> Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
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@ -609,6 +609,149 @@ static int destroy_uc(PVRDMADev *dev, union pvrdma_cmd_req *req,
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return 0;
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}
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static int create_srq_ring(PCIDevice *pci_dev, PvrdmaRing **ring,
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uint64_t pdir_dma, uint32_t max_wr,
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uint32_t max_sge, uint32_t nchunks)
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{
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uint64_t *dir = NULL, *tbl = NULL;
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PvrdmaRing *r;
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int rc = -EINVAL;
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char ring_name[MAX_RING_NAME_SZ];
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uint32_t wqe_sz;
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if (!nchunks || nchunks > PVRDMA_MAX_FAST_REG_PAGES) {
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rdma_error_report("Got invalid page count for SRQ ring: %d",
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nchunks);
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return rc;
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}
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dir = rdma_pci_dma_map(pci_dev, pdir_dma, TARGET_PAGE_SIZE);
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if (!dir) {
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rdma_error_report("Failed to map to SRQ page directory");
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goto out;
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}
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tbl = rdma_pci_dma_map(pci_dev, dir[0], TARGET_PAGE_SIZE);
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if (!tbl) {
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rdma_error_report("Failed to map to SRQ page table");
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goto out;
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}
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r = g_malloc(sizeof(*r));
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*ring = r;
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r->ring_state = (struct pvrdma_ring *)
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rdma_pci_dma_map(pci_dev, tbl[0], TARGET_PAGE_SIZE);
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if (!r->ring_state) {
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rdma_error_report("Failed to map tp SRQ ring state");
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goto out_free_ring_mem;
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}
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wqe_sz = pow2ceil(sizeof(struct pvrdma_rq_wqe_hdr) +
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sizeof(struct pvrdma_sge) * max_sge - 1);
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sprintf(ring_name, "srq_ring_%" PRIx64, pdir_dma);
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rc = pvrdma_ring_init(r, ring_name, pci_dev, &r->ring_state[1], max_wr,
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wqe_sz, (dma_addr_t *)&tbl[1], nchunks - 1);
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if (rc) {
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goto out_unmap_ring_state;
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}
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goto out;
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out_unmap_ring_state:
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rdma_pci_dma_unmap(pci_dev, r->ring_state, TARGET_PAGE_SIZE);
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out_free_ring_mem:
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g_free(r);
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out:
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rdma_pci_dma_unmap(pci_dev, tbl, TARGET_PAGE_SIZE);
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rdma_pci_dma_unmap(pci_dev, dir, TARGET_PAGE_SIZE);
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return rc;
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}
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static void destroy_srq_ring(PvrdmaRing *ring)
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{
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pvrdma_ring_free(ring);
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rdma_pci_dma_unmap(ring->dev, ring->ring_state, TARGET_PAGE_SIZE);
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g_free(ring);
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}
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static int create_srq(PVRDMADev *dev, union pvrdma_cmd_req *req,
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union pvrdma_cmd_resp *rsp)
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{
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struct pvrdma_cmd_create_srq *cmd = &req->create_srq;
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struct pvrdma_cmd_create_srq_resp *resp = &rsp->create_srq_resp;
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PvrdmaRing *ring = NULL;
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int rc;
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memset(resp, 0, sizeof(*resp));
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rc = create_srq_ring(PCI_DEVICE(dev), &ring, cmd->pdir_dma,
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cmd->attrs.max_wr, cmd->attrs.max_sge,
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cmd->nchunks);
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if (rc) {
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return rc;
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}
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rc = rdma_rm_alloc_srq(&dev->rdma_dev_res, cmd->pd_handle,
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cmd->attrs.max_wr, cmd->attrs.max_sge,
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cmd->attrs.srq_limit, &resp->srqn, ring);
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if (rc) {
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destroy_srq_ring(ring);
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return rc;
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}
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return 0;
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}
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static int query_srq(PVRDMADev *dev, union pvrdma_cmd_req *req,
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union pvrdma_cmd_resp *rsp)
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{
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struct pvrdma_cmd_query_srq *cmd = &req->query_srq;
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struct pvrdma_cmd_query_srq_resp *resp = &rsp->query_srq_resp;
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memset(resp, 0, sizeof(*resp));
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return rdma_rm_query_srq(&dev->rdma_dev_res, cmd->srq_handle,
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(struct ibv_srq_attr *)&resp->attrs);
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}
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static int modify_srq(PVRDMADev *dev, union pvrdma_cmd_req *req,
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union pvrdma_cmd_resp *rsp)
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{
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struct pvrdma_cmd_modify_srq *cmd = &req->modify_srq;
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/* Only support SRQ limit */
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if (!(cmd->attr_mask & IBV_SRQ_LIMIT) ||
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(cmd->attr_mask & IBV_SRQ_MAX_WR))
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return -EINVAL;
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return rdma_rm_modify_srq(&dev->rdma_dev_res, cmd->srq_handle,
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(struct ibv_srq_attr *)&cmd->attrs,
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cmd->attr_mask);
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}
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static int destroy_srq(PVRDMADev *dev, union pvrdma_cmd_req *req,
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union pvrdma_cmd_resp *rsp)
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{
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struct pvrdma_cmd_destroy_srq *cmd = &req->destroy_srq;
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RdmaRmSRQ *srq;
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PvrdmaRing *ring;
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srq = rdma_rm_get_srq(&dev->rdma_dev_res, cmd->srq_handle);
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if (!srq) {
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return -EINVAL;
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}
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ring = (PvrdmaRing *)srq->opaque;
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destroy_srq_ring(ring);
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rdma_rm_dealloc_srq(&dev->rdma_dev_res, cmd->srq_handle);
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return 0;
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}
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struct cmd_handler {
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uint32_t cmd;
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uint32_t ack;
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@ -634,6 +777,10 @@ static struct cmd_handler cmd_handlers[] = {
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{PVRDMA_CMD_DESTROY_UC, PVRDMA_CMD_DESTROY_UC_RESP_NOOP, destroy_uc},
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{PVRDMA_CMD_CREATE_BIND, PVRDMA_CMD_CREATE_BIND_RESP_NOOP, create_bind},
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{PVRDMA_CMD_DESTROY_BIND, PVRDMA_CMD_DESTROY_BIND_RESP_NOOP, destroy_bind},
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{PVRDMA_CMD_CREATE_SRQ, PVRDMA_CMD_CREATE_SRQ_RESP, create_srq},
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{PVRDMA_CMD_QUERY_SRQ, PVRDMA_CMD_QUERY_SRQ_RESP, query_srq},
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{PVRDMA_CMD_MODIFY_SRQ, PVRDMA_CMD_MODIFY_SRQ_RESP, modify_srq},
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{PVRDMA_CMD_DESTROY_SRQ, PVRDMA_CMD_DESTROY_SRQ_RESP, destroy_srq},
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};
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int pvrdma_exec_cmd(PVRDMADev *dev)
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@ -53,6 +53,7 @@ static Property pvrdma_dev_properties[] = {
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DEFINE_PROP_INT32("dev-caps-max-qp-init-rd-atom", PVRDMADev,
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dev_attr.max_qp_init_rd_atom, MAX_QP_INIT_RD_ATOM),
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DEFINE_PROP_INT32("dev-caps-max-ah", PVRDMADev, dev_attr.max_ah, MAX_AH),
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DEFINE_PROP_INT32("dev-caps-max-srq", PVRDMADev, dev_attr.max_srq, MAX_SRQ),
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DEFINE_PROP_CHR("mad-chardev", PVRDMADev, mad_chr),
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DEFINE_PROP_END_OF_LIST(),
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};
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@ -261,6 +262,9 @@ static void init_dsr_dev_caps(PVRDMADev *dev)
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dsr->caps.max_mr = dev->dev_attr.max_mr;
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dsr->caps.max_pd = dev->dev_attr.max_pd;
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dsr->caps.max_ah = dev->dev_attr.max_ah;
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dsr->caps.max_srq = dev->dev_attr.max_srq;
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dsr->caps.max_srq_wr = dev->dev_attr.max_srq_wr;
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dsr->caps.max_srq_sge = dev->dev_attr.max_srq_sge;
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dsr->caps.gid_tbl_len = MAX_GIDS;
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dsr->caps.sys_image_guid = 0;
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dsr->caps.node_guid = dev->node_guid;
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@ -485,6 +489,13 @@ static void pvrdma_uar_write(void *opaque, hwaddr addr, uint64_t val,
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pvrdma_cq_poll(&dev->rdma_dev_res, val & PVRDMA_UAR_HANDLE_MASK);
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}
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break;
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case PVRDMA_UAR_SRQ_OFFSET:
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if (val & PVRDMA_UAR_SRQ_RECV) {
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trace_pvrdma_uar_write(addr, val, "QP", "SRQ",
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val & PVRDMA_UAR_HANDLE_MASK, 0);
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pvrdma_srq_recv(dev, val & PVRDMA_UAR_HANDLE_MASK);
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}
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break;
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default:
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rdma_error_report("Unsupported command, addr=0x%"PRIx64", val=0x%"PRIx64,
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addr, val);
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@ -554,6 +565,11 @@ static void init_dev_caps(PVRDMADev *dev)
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dev->dev_attr.max_cqe = pg_tbl_bytes / sizeof(struct pvrdma_cqe) -
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TARGET_PAGE_SIZE; /* First page is ring state */
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dev->dev_attr.max_srq_wr = pg_tbl_bytes /
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((sizeof(struct pvrdma_rq_wqe_hdr) +
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sizeof(struct pvrdma_sge)) *
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dev->dev_attr.max_sge) - TARGET_PAGE_SIZE;
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}
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static int pvrdma_check_ram_shared(Object *obj, void *opaque)
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@ -70,7 +70,7 @@ static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle,
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memset(cqe1, 0, sizeof(*cqe1));
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cqe1->wr_id = cqe->wr_id;
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cqe1->qp = cqe->qp;
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cqe1->qp = cqe->qp ? cqe->qp : wc->qp_num;
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cqe1->opcode = cqe->opcode;
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cqe1->status = wc->status;
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cqe1->byte_len = wc->byte_len;
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@ -241,6 +241,50 @@ void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle)
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}
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}
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void pvrdma_srq_recv(PVRDMADev *dev, uint32_t srq_handle)
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{
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RdmaRmSRQ *srq;
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PvrdmaRqWqe *wqe;
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PvrdmaRing *ring;
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srq = rdma_rm_get_srq(&dev->rdma_dev_res, srq_handle);
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if (unlikely(!srq)) {
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return;
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}
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ring = (PvrdmaRing *)srq->opaque;
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wqe = (struct PvrdmaRqWqe *)pvrdma_ring_next_elem_read(ring);
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while (wqe) {
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CompHandlerCtx *comp_ctx;
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/* Prepare CQE */
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comp_ctx = g_malloc(sizeof(CompHandlerCtx));
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comp_ctx->dev = dev;
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comp_ctx->cq_handle = srq->recv_cq_handle;
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comp_ctx->cqe.wr_id = wqe->hdr.wr_id;
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comp_ctx->cqe.qp = 0;
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comp_ctx->cqe.opcode = IBV_WC_RECV;
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if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge,
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dev->dev_attr.max_sge);
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complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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continue;
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}
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rdma_backend_post_srq_recv(&dev->backend_dev, &srq->backend_srq,
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(struct ibv_sge *)&wqe->sge[0],
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wqe->hdr.num_sge,
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comp_ctx);
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pvrdma_ring_read_inc(ring);
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wqe = pvrdma_ring_next_elem_read(ring);
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}
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}
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void pvrdma_cq_poll(RdmaDeviceResources *dev_res, uint32_t cq_handle)
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{
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RdmaRmCQ *cq;
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@ -22,6 +22,7 @@ int pvrdma_qp_ops_init(void);
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void pvrdma_qp_ops_fini(void);
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void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle);
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void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle);
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void pvrdma_srq_recv(PVRDMADev *dev, uint32_t srq_handle);
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void pvrdma_cq_poll(RdmaDeviceResources *dev_res, uint32_t cq_handle);
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#endif
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