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arm_gic: Update ID registers based on revision
Update the GIC ID registers (registers above 0xfe0) based on the GIC revision instead of using the sames values for all GIC implementations. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Message-id: 629e7fa5d47f2800e51cc1f18d12635f1eece349.1453333840.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -31,8 +31,16 @@ do { fprintf(stderr, "arm_gic: " fmt , ## __VA_ARGS__); } while (0)
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#define DPRINTF(fmt, ...) do {} while(0)
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#endif
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static const uint8_t gic_id[] = {
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0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
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static const uint8_t gic_id_11mpcore[] = {
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0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
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};
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static const uint8_t gic_id_gicv1[] = {
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0x04, 0x00, 0x00, 0x00, 0x90, 0xb3, 0x1b, 0x00, 0x0d, 0xf0, 0x05, 0xb1
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};
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static const uint8_t gic_id_gicv2[] = {
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0x04, 0x00, 0x00, 0x00, 0x90, 0xb4, 0x2b, 0x00, 0x0d, 0xf0, 0x05, 0xb1
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};
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static inline int gic_get_current_cpu(GICState *s)
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@ -683,14 +691,31 @@ static uint32_t gic_dist_readb(void *opaque, hwaddr offset, MemTxAttrs attrs)
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}
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res = s->sgi_pending[irq][cpu];
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} else if (offset < 0xfe0) {
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} else if (offset < 0xfd0) {
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goto bad_reg;
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} else /* offset >= 0xfe0 */ {
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} else if (offset < 0x1000) {
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if (offset & 3) {
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res = 0;
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} else {
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res = gic_id[(offset - 0xfe0) >> 2];
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switch (s->revision) {
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case REV_11MPCORE:
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res = gic_id_11mpcore[(offset - 0xfd0) >> 2];
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break;
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case 1:
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res = gic_id_gicv1[(offset - 0xfd0) >> 2];
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break;
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case 2:
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res = gic_id_gicv2[(offset - 0xfd0) >> 2];
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break;
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case REV_NVIC:
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/* Shouldn't be able to get here */
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abort();
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default:
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res = 0;
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}
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}
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} else {
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g_assert_not_reached();
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}
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return res;
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bad_reg:
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