From 3335a04806d337c69f44a707cdc27515d6c91d84 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 4 Nov 2023 12:21:37 -0700 Subject: [PATCH] target/sparc: Add feature bits for VIS 3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The manual separates VIS 3 and VIS 3B, even though they are both present in all extant cpus. For clarity, let the translator match the manual but otherwise leave them on the same feature bit. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/cpu-feature.h.inc | 1 + target/sparc/translate.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index a30b9255b2..3913fb4a54 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -13,3 +13,4 @@ FEATURE(CACHE_CTRL) FEATURE(POWERDOWN) FEATURE(CASA) FEATURE(FMAF) +FEATURE(VIS3) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 5efd09f4f4..59b922c903 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2188,6 +2188,8 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_HYPV(C) ((C)->def->features & CPU_FEATURE_HYPV) # define avail_VIS1(C) ((C)->def->features & CPU_FEATURE_VIS1) # define avail_VIS2(C) ((C)->def->features & CPU_FEATURE_VIS2) +# define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3) +# define avail_VIS3B(C) avail_VIS3(C) #else # define avail_32(C) true # define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17) @@ -2201,6 +2203,8 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_HYPV(C) false # define avail_VIS1(C) false # define avail_VIS2(C) false +# define avail_VIS3(C) false +# define avail_VIS3B(C) false #endif /* Default case for non jump instructions. */