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trivial patches for 2024-01-05 

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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2024-01-05

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# gpg: Signature made Fri 05 Jan 2024 19:29:21 GMT
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg:                issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  docs: use "buses" rather than "busses"
  edu: fix DMA range upper bound check
  hw/net: cadence_gem: Fix MDIO_OP_xxx values
  audio/audio.c: remove trailing newline in error_setg
  chardev/char.c: fix "abstract device type" error message
  target/riscv: Fix mcycle/minstret increment behavior

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2024-01-08 10:28:26 +00:00
parent 8188c3cda5 8a780cd212
commit 33252ebde1
8 changed files with 17 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
audio/audio.c
View File

@ -1744,7 +1744,7 @@ static AudioState *audio_init(Audiodev *dev, Error **errp)
if (driver) { if (driver) {
done = !audio_driver_init(s, driver, dev, errp); done = !audio_driver_init(s, driver, dev, errp);
} else { } else {
error_setg(errp, "Unknown audio driver `%s'\n", drvname); error_setg(errp, "Unknown audio driver `%s'", drvname);
} }
if (!done) { if (!done) {
goto out; goto out;

2
chardev/char.c
View File

@ -518,7 +518,7 @@ static const ChardevClass *char_get_class(const char *driver, Error **errp)
if (object_class_is_abstract(oc)) { if (object_class_is_abstract(oc)) {
error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "driver", error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "driver",
"an abstract device type"); "a non-abstract device type");
return NULL; return NULL;
} }

2
docs/system/arm/palm.rst
View File

@ -14,7 +14,7 @@ following elements:
- On-chip Real Time Clock - On-chip Real Time Clock
- TI TSC2102i touchscreen controller / analog-digital converter / - TI TSC2102i touchscreen controller / analog-digital converter /
Audio CODEC, connected through MicroWire and |I2S| busses Audio CODEC, connected through MicroWire and |I2S| buses
- GPIO-connected matrix keypad - GPIO-connected matrix keypad

2
docs/system/arm/xscale.rst
View File

@ -32,4 +32,4 @@ The clamshell PDA models emulation includes the following peripherals:
- Three on-chip UARTs - Three on-chip UARTs
- WM8750 audio CODEC on |I2C| and |I2S| busses - WM8750 audio CODEC on |I2C| and |I2S| buses

6
docs/system/devices/can.rst
View File

@ -1,12 +1,12 @@
CAN Bus Emulation Support CAN Bus Emulation Support
========================= =========================
The CAN bus emulation provides mechanism to connect multiple The CAN bus emulation provides mechanism to connect multiple
emulated CAN controller chips together by one or multiple CAN busses emulated CAN controller chips together by one or multiple CAN buses
(the controller device "canbus" parameter). The individual busses (the controller device "canbus" parameter). The individual buses
can be connected to host system CAN API (at this time only Linux can be connected to host system CAN API (at this time only Linux
SocketCAN is supported). SocketCAN is supported).
The concept of busses is generic and different CAN controllers The concept of buses is generic and different CAN controllers
can be implemented. can be implemented.
The initial submission implemented SJA1000 controller which The initial submission implemented SJA1000 controller which

2
hw/misc/edu.c
View File

@ -115,7 +115,7 @@ static void edu_check_range(uint64_t addr, uint64_t size1, uint64_t start,
uint64_t end2 = start + size2; uint64_t end2 = start + size2;
if (within(addr, start, end2) && if (within(addr, start, end2) &&
end1 > addr && within(end1, start, end2)) { end1 > addr && end1 <= end2) {
return; return;
} }

4
hw/net/cadence_gem.c
View File

@ -199,8 +199,8 @@ REG32(PHYMNTNC, 0x34) /* Phy Maintenance reg */
FIELD(PHYMNTNC, PHY_ADDR, 23, 5) FIELD(PHYMNTNC, PHY_ADDR, 23, 5)
FIELD(PHYMNTNC, OP, 28, 2) FIELD(PHYMNTNC, OP, 28, 2)
FIELD(PHYMNTNC, ST, 30, 2) FIELD(PHYMNTNC, ST, 30, 2)
#define MDIO_OP_READ 0x3 #define MDIO_OP_READ 0x2
#define MDIO_OP_WRITE 0x2 #define MDIO_OP_WRITE 0x1
REG32(RXPAUSE, 0x38) /* RX Pause Time reg */ REG32(RXPAUSE, 0x38) /* RX Pause Time reg */
REG32(TXPAUSE, 0x3c) /* TX Pause Time reg */ REG32(TXPAUSE, 0x3c) /* TX Pause Time reg */

14
target/riscv/csr.c
View File

@ -907,11 +907,11 @@ static int write_mhpmcounterh(CPURISCVState *env, int csrno, target_ulong val)
static RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val, static RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val,
bool upper_half, uint32_t ctr_idx) bool upper_half, uint32_t ctr_idx)
{ {
PMUCTRState counter = env->pmu_ctrs[ctr_idx]; PMUCTRState *counter = &env->pmu_ctrs[ctr_idx];
target_ulong ctr_prev = upper_half ? counter.mhpmcounterh_prev : target_ulong ctr_prev = upper_half ? counter->mhpmcounterh_prev :
counter.mhpmcounter_prev; counter->mhpmcounter_prev;
target_ulong ctr_val = upper_half ? counter.mhpmcounterh_val : target_ulong ctr_val = upper_half ? counter->mhpmcounterh_val :
counter.mhpmcounter_val; counter->mhpmcounter_val;
if (get_field(env->mcountinhibit, BIT(ctr_idx))) { if (get_field(env->mcountinhibit, BIT(ctr_idx))) {
/* /*
@ -919,12 +919,12 @@ static RISCVException riscv_pmu_read_ctr(CPURISCVState *env, target_ulong *val,
* stop the icount counting. Just return the counter value written by * stop the icount counting. Just return the counter value written by
* the supervisor to indicate that counter was not incremented. * the supervisor to indicate that counter was not incremented.
*/ */
if (!counter.started) { if (!counter->started) {
*val = ctr_val; *val = ctr_val;
return RISCV_EXCP_NONE; return RISCV_EXCP_NONE;
} else { } else {
/* Mark that the counter has been stopped */ /* Mark that the counter has been stopped */
counter.started = false; counter->started = false;
} }
} }