mirror of https://github.com/xemu-project/xemu.git
mcpx: Use new bql_[un]lock functions
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5cb65d1791
commit
3106ea97e5
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@ -20,6 +20,7 @@
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*/
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#include "hw/xbox/nv2a/nv2a_int.h"
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#include "qemu/main-loop.h"
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void nv2a_update_irq(NV2AState *d)
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{
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@ -244,9 +245,9 @@ static void nv2a_lock_fifo(NV2AState *d)
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{
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qemu_mutex_lock(&d->pfifo.lock);
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qemu_cond_broadcast(&d->pfifo.fifo_cond);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_cond_wait(&d->pfifo.fifo_idle_cond, &d->pfifo.lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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qemu_mutex_lock(&d->pgraph.lock);
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}
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@ -267,9 +268,9 @@ static void nv2a_reset(NV2AState *d)
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qemu_event_reset(&d->pgraph.flush_complete);
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qatomic_set(&d->pgraph.flush_pending, true);
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nv2a_unlock_fifo(d);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_event_wait(&d->pgraph.flush_complete);
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qemu_mutex_lock_iothread();
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bql_lock();
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nv2a_lock_fifo(d);
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if (!halted) {
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qatomic_set(&d->pfifo.halt, false);
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@ -366,9 +367,9 @@ static void nv2a_vm_state_change(void *opaque, bool running, RunState state)
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qatomic_set(&d->pfifo.halt, true);
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pgraph_pre_savevm_trigger(d);
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nv2a_unlock_fifo(d);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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pgraph_pre_savevm_wait(d);
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qemu_mutex_lock_iothread();
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bql_lock();
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nv2a_lock_fifo(d);
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} else if (state == RUN_STATE_RESTORE_VM) {
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nv2a_lock_fifo(d);
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@ -382,9 +383,9 @@ static void nv2a_vm_state_change(void *opaque, bool running, RunState state)
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nv2a_lock_fifo(d);
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pgraph_pre_shutdown_trigger(d);
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nv2a_unlock_fifo(d);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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pgraph_pre_shutdown_wait(d);
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qemu_mutex_lock_iothread();
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bql_lock();
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}
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}
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@ -207,12 +207,12 @@ static ssize_t pfifo_run_puller(NV2AState *d, uint32_t method_entry,
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/* methods that take objects.
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* TODO: Check this range is correct for the nv2a */
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if (method >= 0x180 && method < 0x200) {
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//qemu_mutex_lock_iothread();
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//bql_lock();
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RAMHTEntry entry = ramht_lookup(d, parameter);
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assert(entry.valid);
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// assert(entry.channel_id == state->channel_id);
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parameter = entry.instance;
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//qemu_mutex_unlock_iothread();
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//bql_unlock();
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}
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enum FIFOEngine engine = GET_MASK(*engine_reg, 3 << (4*subchannel));
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@ -482,12 +482,12 @@ static SurfaceBinding *surface_put(NV2AState *d, hwaddr addr,
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if (tcg_enabled()) {
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qemu_mutex_unlock(&d->pgraph.lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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mem_access_callback_insert(qemu_get_cpu(0),
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d->vram, surface_out->vram_addr, surface_out->size,
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&surface_out->access_cb, &surface_access_callback,
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surface_out);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.lock);
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}
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@ -545,9 +545,9 @@ void pgraph_gl_surface_invalidate(NV2AState *d, SurfaceBinding *surface)
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if (tcg_enabled()) {
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qemu_mutex_unlock(&d->pgraph.lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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mem_access_callback_remove_by_ref(qemu_get_cpu(0), surface->access_cb);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.lock);
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}
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@ -197,10 +197,10 @@ void pgraph_context_switch(NV2AState *d, unsigned int channel_id)
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pg->waiting_for_context_switch = true;
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qemu_mutex_unlock(&pg->lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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pg->pending_interrupts |= NV_PGRAPH_INTR_CONTEXT_SWITCH;
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nv2a_update_irq(d);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&pg->lock);
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}
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}
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@ -381,13 +381,13 @@ void nv2a_set_surface_scale_factor(unsigned int scale)
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{
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NV2AState *d = g_nv2a;
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.renderer_lock);
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if (d->pgraph.renderer->ops.set_surface_scale_factor) {
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d->pgraph.renderer->ops.set_surface_scale_factor(d, scale);
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}
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qemu_mutex_unlock(&d->pgraph.renderer_lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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}
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unsigned int nv2a_get_surface_scale_factor(void)
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@ -395,13 +395,13 @@ unsigned int nv2a_get_surface_scale_factor(void)
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NV2AState *d = g_nv2a;
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int s = 1;
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.renderer_lock);
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if (d->pgraph.renderer->ops.get_surface_scale_factor) {
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s = d->pgraph.renderer->ops.get_surface_scale_factor(d);
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}
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qemu_mutex_unlock(&d->pgraph.renderer_lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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return s;
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}
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@ -846,9 +846,9 @@ DEF_METHOD(NV097, NO_OPERATION)
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pg->waiting_for_nop = true;
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qemu_mutex_unlock(&pg->lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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nv2a_update_irq(d);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&pg->lock);
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}
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@ -2649,7 +2649,7 @@ DEF_METHOD(NV097, BACK_END_WRITE_SEMAPHORE_RELEASE)
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d->pgraph.renderer->ops.surface_update(d, false, true, true);
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//qemu_mutex_unlock(&d->pgraph.lock);
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//qemu_mutex_lock_iothread();
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//bql_lock();
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uint32_t semaphore_offset = pgraph_reg_r(pg, NV_PGRAPH_SEMAPHOREOFFSET);
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@ -2662,7 +2662,7 @@ DEF_METHOD(NV097, BACK_END_WRITE_SEMAPHORE_RELEASE)
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stl_le_p((uint32_t*)semaphore_data, parameter);
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//qemu_mutex_lock(&d->pgraph.lock);
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//qemu_mutex_unlock_iothread();
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//bql_unlock();
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}
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DEF_METHOD(NV097, SET_ZMIN_MAX_CONTROL)
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@ -546,12 +546,12 @@ static void register_cpu_access_callback(NV2AState *d, SurfaceBinding *surface)
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{
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if (tcg_enabled()) {
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qemu_mutex_unlock(&d->pgraph.lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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mem_access_callback_insert(qemu_get_cpu(0),
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d->vram, surface->vram_addr, surface->size,
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&surface->access_cb, &surface_access_callback,
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surface);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.lock);
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}
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}
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@ -561,9 +561,9 @@ static void unregister_cpu_access_callback(NV2AState *d,
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{
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if (tcg_enabled()) {
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qemu_mutex_unlock(&d->pgraph.lock);
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qemu_mutex_lock_iothread();
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bql_lock();
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mem_access_callback_remove_by_ref(qemu_get_cpu(0), surface->access_cb);
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qemu_mutex_unlock_iothread();
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bql_unlock();
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qemu_mutex_lock(&d->pgraph.lock);
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}
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}
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