mirror of https://github.com/xemu-project/xemu.git
cris: Add interrupt signals to the CPU device
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -152,6 +152,21 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
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ccc->parent_realize(dev, errp);
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}
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#ifndef CONFIG_USER_ONLY
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static void cris_cpu_set_irq(void *opaque, int irq, int level)
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{
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CRISCPU *cpu = opaque;
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CPUState *cs = CPU(cpu);
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int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
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if (level) {
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cpu_interrupt(cs, type);
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} else {
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cpu_reset_interrupt(cs, type);
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}
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}
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#endif
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static void cris_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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@ -165,6 +180,11 @@ static void cris_cpu_initfn(Object *obj)
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env->pregs[PR_VR] = ccc->vr;
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#ifndef CONFIG_USER_ONLY
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/* IRQ and NMI lines. */
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qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
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#endif
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if (tcg_enabled() && !tcg_initialized) {
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tcg_initialized = true;
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if (env->pregs[PR_VR] < 32) {
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@ -42,6 +42,10 @@
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/* CRIS-specific interrupt pending bits. */
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#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
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/* CRUS CPU device objects interrupt lines. */
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#define CRIS_CPU_IRQ 0
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#define CRIS_CPU_NMI 1
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/* Register aliases. R0 - R15 */
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#define R_FP 8
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#define R_SP 14
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