mirror of https://github.com/xemu-project/xemu.git
tests/qtest: sifive-e-aon-watchdog-test.c: Add QTest of watchdog of sifive_e
Add some simple tests of the watchdog timer in the always-on domain device of HiFive 1 rev b. Signed-off-by: Tommy Wu <tommy.wu@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Acked-by: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230627141216.3962299-4-tommy.wu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Tommy Wu
Alistair Francis
parent
82193640c4
commit
2f849e9d7a
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@ -234,6 +234,9 @@ qtests_s390x = \
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'cpu-plug-test',
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'migration-test']
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qtests_riscv32 = \
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(config_all_devices.has_key('CONFIG_SIFIVE_E_AON') ? ['sifive-e-aon-watchdog-test'] : [])
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qos_test_ss = ss.source_set()
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qos_test_ss.add(
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'ac97-test.c',
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@ -0,0 +1,450 @@
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/*
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* QTest testcase for the watchdog timer of HiFive 1 rev b.
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*
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* Copyright (c) 2023 SiFive, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/timer.h"
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#include "qemu/bitops.h"
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#include "libqtest.h"
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#include "hw/registerfields.h"
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#include "hw/misc/sifive_e_aon.h"
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FIELD(AON_WDT_WDOGCFG, SCALE, 0, 4)
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FIELD(AON_WDT_WDOGCFG, RSVD0, 4, 4)
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FIELD(AON_WDT_WDOGCFG, RSTEN, 8, 1)
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FIELD(AON_WDT_WDOGCFG, ZEROCMP, 9, 1)
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FIELD(AON_WDT_WDOGCFG, RSVD1, 10, 2)
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FIELD(AON_WDT_WDOGCFG, EN_ALWAYS, 12, 1)
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FIELD(AON_WDT_WDOGCFG, EN_CORE_AWAKE, 13, 1)
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FIELD(AON_WDT_WDOGCFG, RSVD2, 14, 14)
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FIELD(AON_WDT_WDOGCFG, IP0, 28, 1)
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FIELD(AON_WDT_WDOGCFG, RSVD3, 29, 3)
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#define WDOG_BASE (0x10000000)
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#define WDOGCFG (0x0)
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#define WDOGCOUNT (0x8)
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#define WDOGS (0x10)
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#define WDOGFEED (0x18)
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#define WDOGKEY (0x1c)
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#define WDOGCMP0 (0x20)
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#define SIFIVE_E_AON_WDOGKEY (0x51F15E)
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#define SIFIVE_E_AON_WDOGFEED (0xD09F00D)
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#define SIFIVE_E_LFCLK_DEFAULT_FREQ (32768)
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static void test_init(QTestState *qts)
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{
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, 0);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF);
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}
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static void test_wdogcount(void)
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{
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uint64_t tmp;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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tmp = qtest_readl(qts, WDOG_BASE + WDOGCOUNT);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xBEEF);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == tmp);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xBEEF);
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g_assert(0xBEEF == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xAAAAAAAA);
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g_assert(0x2AAAAAAA == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xAAAAAAAA);
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g_assert(0x2AAAAAAA == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGFEED, SIFIVE_E_AON_WDOGFEED);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
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qtest_quit(qts);
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}
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static void test_wdogcfg(void)
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{
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uint32_t tmp_cfg;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, 0xFFFFFFFF);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCFG) == tmp_cfg);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, 0xFFFFFFFF);
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g_assert(0xFFFFFFFF == qtest_readl(qts, WDOG_BASE + WDOGCFG));
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tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(15 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, SCALE));
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g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, RSTEN));
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g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, ZEROCMP));
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g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
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g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
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g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, IP0));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, 0);
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tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, SCALE));
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, RSTEN));
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, ZEROCMP));
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
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g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, IP0));
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCFG));
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qtest_quit(qts);
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}
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static void test_wdogcmp0(void)
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{
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uint32_t tmp;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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tmp = qtest_readl(qts, WDOG_BASE + WDOGCMP0);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCMP0) == tmp);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF);
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g_assert(0xBEEF == qtest_readl(qts, WDOG_BASE + WDOGCMP0));
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qtest_quit(qts);
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}
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static void test_wdogkey(void)
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{
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, 0xFFFF);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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g_assert(1 == qtest_readl(qts, WDOG_BASE + WDOGKEY));
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qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xAAAAAAAA);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY));
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qtest_quit(qts);
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}
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static void test_wdogfeed(void)
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{
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGFEED));
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qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xFFFF);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGFEED));
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qtest_quit(qts);
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}
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static void test_scaled_wdogs(void)
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{
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uint32_t cfg;
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uint32_t fake_count = 0x12345678;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, fake_count);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == fake_count);
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g_assert((uint16_t)qtest_readl(qts, WDOG_BASE + WDOGS) ==
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(uint16_t)fake_count);
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for (int i = 0; i < 16; i++) {
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, i);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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g_assert((uint16_t)qtest_readl(qts, WDOG_BASE + WDOGS) ==
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(uint16_t)(fake_count >>
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FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)));
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}
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qtest_quit(qts);
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}
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static void test_watchdog(void)
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{
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uint32_t cfg;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, SIFIVE_E_LFCLK_DEFAULT_FREQ);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 0);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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qtest_clock_step(qts, NANOSECONDS_PER_SECOND);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) ==
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SIFIVE_E_LFCLK_DEFAULT_FREQ);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGS) ==
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SIFIVE_E_LFCLK_DEFAULT_FREQ);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
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qtest_quit(qts);
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}
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static void test_scaled_watchdog(void)
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{
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uint32_t cfg;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, 10);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 15);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 10);
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g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) ==
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SIFIVE_E_LFCLK_DEFAULT_FREQ * 10);
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g_assert(10 == qtest_readl(qts, WDOG_BASE + WDOGS));
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
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qtest_quit(qts);
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}
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static void test_periodic_int(void)
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{
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uint32_t cfg;
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QTestState *qts = qtest_init("-machine sifive_e");
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test_init(qts);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCMP0, SIFIVE_E_LFCLK_DEFAULT_FREQ);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 0);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, ZEROCMP, 1);
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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qtest_clock_step(qts, NANOSECONDS_PER_SECOND);
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
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g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGS));
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
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g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
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cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0);
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qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
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qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
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cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
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g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
qtest_clock_step(qts, NANOSECONDS_PER_SECOND);
|
||||
|
||||
g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT));
|
||||
g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGS));
|
||||
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
static void test_enable_disable(void)
|
||||
{
|
||||
uint32_t cfg;
|
||||
QTestState *qts = qtest_init("-machine sifive_e");
|
||||
|
||||
test_init(qts);
|
||||
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCMP0, 10);
|
||||
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 15);
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
|
||||
|
||||
qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2);
|
||||
|
||||
g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) ==
|
||||
SIFIVE_E_LFCLK_DEFAULT_FREQ * 2);
|
||||
g_assert(2 == qtest_readl(qts, WDOG_BASE + WDOGS));
|
||||
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 0);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
|
||||
|
||||
qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 8);
|
||||
|
||||
g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) ==
|
||||
SIFIVE_E_LFCLK_DEFAULT_FREQ * 2);
|
||||
g_assert(2 == qtest_readl(qts, WDOG_BASE + WDOGS));
|
||||
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
|
||||
|
||||
qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 8);
|
||||
|
||||
g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) ==
|
||||
SIFIVE_E_LFCLK_DEFAULT_FREQ * 10);
|
||||
g_assert(10 == qtest_readl(qts, WDOG_BASE + WDOGS));
|
||||
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS));
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE));
|
||||
g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0);
|
||||
cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY);
|
||||
qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg);
|
||||
cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG);
|
||||
g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0));
|
||||
|
||||
qtest_quit(qts);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
g_test_init(&argc, &argv, NULL);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/wdogcount",
|
||||
test_wdogcount);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/wdogcfg",
|
||||
test_wdogcfg);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/wdogcmp0",
|
||||
test_wdogcmp0);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/wdogkey",
|
||||
test_wdogkey);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/wdogfeed",
|
||||
test_wdogfeed);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/scaled_wdogs",
|
||||
test_scaled_wdogs);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/watchdog",
|
||||
test_watchdog);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/scaled_watchdog",
|
||||
test_scaled_watchdog);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/periodic_int",
|
||||
test_periodic_int);
|
||||
qtest_add_func("/sifive-e-aon-watchdog-test/enable_disable",
|
||||
test_enable_disable);
|
||||
return g_test_run();
|
||||
}
|
||||
Loading…
Reference in New Issue