mirror of https://github.com/xemu-project/xemu.git
target/m68k: add fsglmul and fsgldiv
fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170628204241.32106-6-laurent@vivier.eu>
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@ -253,6 +253,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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PREC_END();
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}
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void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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int rounding_mode = get_float_rounding_mode(&env->fp_status);
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floatx80 a, b;
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PREC_BEGIN(32);
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set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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a = floatx80_round(val0->d, &env->fp_status);
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b = floatx80_round(val1->d, &env->fp_status);
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set_float_rounding_mode(rounding_mode, &env->fp_status);
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res->d = floatx80_mul(a, b, &env->fp_status);
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PREC_END();
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}
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void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
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@ -272,6 +286,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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PREC_END();
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}
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void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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int rounding_mode = get_float_rounding_mode(&env->fp_status);
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floatx80 a, b;
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PREC_BEGIN(32);
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set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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a = floatx80_round(val1->d, &env->fp_status);
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b = floatx80_round(val0->d, &env->fp_status);
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set_float_rounding_mode(rounding_mode, &env->fp_status);
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res->d = floatx80_div(a, b, &env->fp_status);
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PREC_END();
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}
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static int float_comp_to_cc(int float_compare)
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{
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switch (float_compare) {
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@ -39,9 +39,11 @@ DEF_HELPER_4(fdsub, void, env, fp, fp, fp)
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DEF_HELPER_4(fmul, void, env, fp, fp, fp)
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DEF_HELPER_4(fsmul, void, env, fp, fp, fp)
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DEF_HELPER_4(fdmul, void, env, fp, fp, fp)
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DEF_HELPER_4(fsglmul, void, env, fp, fp, fp)
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DEF_HELPER_4(fdiv, void, env, fp, fp, fp)
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DEF_HELPER_4(fsdiv, void, env, fp, fp, fp)
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DEF_HELPER_4(fddiv, void, env, fp, fp, fp)
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DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp)
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DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp)
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DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32)
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DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp)
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@ -4646,6 +4646,12 @@ DISAS_INSN(fpu)
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case 0x67: /* fdmul */
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gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest);
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break;
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case 0x24: /* fsgldiv */
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gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest);
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break;
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case 0x27: /* fsglmul */
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gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest);
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break;
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case 0x28: /* fsub */
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gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest);
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break;
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