mirror of https://github.com/xemu-project/xemu.git
tcg/tci: Reuse tci_args_l for calls.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
b95aa12ed2
commit
2ed8a38192
38
tcg/tci.c
38
tcg/tci.c
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@ -437,30 +437,30 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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switch (opc) {
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switch (opc) {
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case INDEX_op_call:
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case INDEX_op_call:
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t0 = tci_read_i(&tb_ptr);
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tci_args_l(&tb_ptr, &ptr);
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tci_tb_ptr = (uintptr_t)tb_ptr;
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tci_tb_ptr = (uintptr_t)tb_ptr;
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#if TCG_TARGET_REG_BITS == 32
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#if TCG_TARGET_REG_BITS == 32
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tmp64 = ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0),
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tmp64 = ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R5),
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tci_read_reg(regs, TCG_REG_R5),
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tci_read_reg(regs, TCG_REG_R6),
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tci_read_reg(regs, TCG_REG_R6),
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tci_read_reg(regs, TCG_REG_R7),
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tci_read_reg(regs, TCG_REG_R7),
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tci_read_reg(regs, TCG_REG_R8),
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tci_read_reg(regs, TCG_REG_R8),
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tci_read_reg(regs, TCG_REG_R9),
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tci_read_reg(regs, TCG_REG_R9),
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tci_read_reg(regs, TCG_REG_R10),
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tci_read_reg(regs, TCG_REG_R10),
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tci_read_reg(regs, TCG_REG_R11));
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tci_read_reg(regs, TCG_REG_R11));
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32);
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tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32);
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#else
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#else
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tmp64 = ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0),
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tmp64 = ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R1),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R2),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R3),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R4),
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tci_read_reg(regs, TCG_REG_R5));
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tci_read_reg(regs, TCG_REG_R5));
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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tci_write_reg(regs, TCG_REG_R0, tmp64);
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#endif
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#endif
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break;
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break;
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