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target/riscv: Factor out extension tests to cpu_cfg.h 

This patch moves the extension test functions that are used
to gate vendor extension decoders, into cpu_cfg.h.
This allows to reuse them in the disassembler.

This patch does not introduce new functionality.
However, the patch includes a small change:
The parameter for the extension test functions has been changed
from 'DisasContext*' to 'const RISCVCPUConfig*' to keep
the code in cpu_cfg.h self-contained.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-Id: <20230612111034.3955227-3-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Christoph Müllner 2023-06-12 13:10:28 +02:00 committed by Alistair Francis
parent 94692c3a34
commit 2e8c1e0215
2 changed files with 28 additions and 25 deletions
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26
target/riscv/cpu_cfg.h
View File

@ -133,4 +133,30 @@ struct RISCVCPUConfig {
};
typedef struct RISCVCPUConfig RISCVCPUConfig;
/* Helper functions to test for extensions. */
static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__)))
{
return true;
}
static inline bool has_xthead_p(const RISCVCPUConfig *cfg)
{
return cfg->ext_xtheadba || cfg->ext_xtheadbb ||
cfg->ext_xtheadbs || cfg->ext_xtheadcmo ||
cfg->ext_xtheadcondmov ||
cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv ||
cfg->ext_xtheadmac || cfg->ext_xtheadmemidx ||
cfg->ext_xtheadmempair || cfg->ext_xtheadsync;
}
#define MATERIALISE_EXT_PREDICATE(ext) \
static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \
{ \
return cfg->ext_ ## ext ; \
}
MATERIALISE_EXT_PREDICATE(XVentanaCondOps)
#endif

27
target/riscv/translate.c
View File

@ -121,29 +121,6 @@ static inline bool has_ext(DisasContext *ctx, uint32_t ext)
return ctx->misa_ext & ext;
}
static bool always_true_p(DisasContext *ctx __attribute__((__unused__)))
{
return true;
}
static bool has_xthead_p(DisasContext *ctx __attribute__((__unused__)))
{
return ctx->cfg_ptr->ext_xtheadba || ctx->cfg_ptr->ext_xtheadbb ||
ctx->cfg_ptr->ext_xtheadbs || ctx->cfg_ptr->ext_xtheadcmo ||
ctx->cfg_ptr->ext_xtheadcondmov ||
ctx->cfg_ptr->ext_xtheadfmemidx || ctx->cfg_ptr->ext_xtheadfmv ||
ctx->cfg_ptr->ext_xtheadmac || ctx->cfg_ptr->ext_xtheadmemidx ||
ctx->cfg_ptr->ext_xtheadmempair || ctx->cfg_ptr->ext_xtheadsync;
}
#define MATERIALISE_EXT_PREDICATE(ext) \
static bool has_ ## ext ## _p(DisasContext *ctx) \
{ \
return ctx->cfg_ptr->ext_ ## ext ; \
}
MATERIALISE_EXT_PREDICATE(XVentanaCondOps);
#ifdef TARGET_RISCV32
#define get_xl(ctx) MXL_RV32
#elif defined(CONFIG_USER_ONLY)
@ -1134,7 +1111,7 @@ static void decode_opc(CPURISCVState *env, DisasContext *ctx, uint16_t opcode)
* that are tested in-order until a decoder matches onto the opcode.
*/
static const struct {
bool (*guard_func)(DisasContext *);
bool (*guard_func)(const RISCVCPUConfig *);
bool (*decode_func)(DisasContext *, uint32_t);
} decoders[] = {
{ always_true_p, decode_insn32 },
@ -1163,7 +1140,7 @@ static void decode_opc(CPURISCVState *env, DisasContext *ctx, uint16_t opcode)
ctx->opcode = opcode32;
for (size_t i = 0; i < ARRAY_SIZE(decoders); ++i) {
if (decoders[i].guard_func(ctx) &&
if (decoders[i].guard_func(ctx->cfg_ptr) &&
decoders[i].decode_func(ctx, opcode32)) {
return;
}