From 2e0b925a341ddaa4be577542c74aa19b992215c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 7 Feb 2024 16:26:12 +0100 Subject: [PATCH] hw/rx/rx62n: Only call qdev_get_gpio_in() when necessary MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of filling an array of all the possible IRQs, only call qdev_get_gpio_in() when an IRQ is used. Remove the array from RX62NState. Doing so we avoid calling qdev_get_gpio_in() on an unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Yoshinori Sato Reviewed-by: Richard Henderson Message-Id: <20240213130341.1793-4-philmd@linaro.org> --- hw/rx/rx62n.c | 16 ++++++++-------- include/hw/rx/rx62n.h | 1 - 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c index d3f61a6837..560f53a58a 100644 --- a/hw/rx/rx62n.c +++ b/hw/rx/rx62n.c @@ -148,14 +148,11 @@ static void register_icu(RX62NState *s) qlist_append_int(trigger_level, levelirq[i]); } qdev_prop_set_array(DEVICE(icu), "trigger-level", trigger_level); - - for (i = 0; i < NR_IRQS; i++) { - s->irq[i] = qdev_get_gpio_in(DEVICE(icu), i); - } sysbus_realize(icu, &error_abort); + sysbus_connect_irq(icu, 0, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_IRQ)); sysbus_connect_irq(icu, 1, qdev_get_gpio_in(DEVICE(&s->cpu), RX_CPU_FIR)); - sysbus_connect_irq(icu, 2, s->irq[SWI]); + sysbus_connect_irq(icu, 2, qdev_get_gpio_in(DEVICE(&s->icu), SWI)); sysbus_mmio_map(icu, 0, RX62N_ICU_BASE); } @@ -172,7 +169,8 @@ static void register_tmr(RX62NState *s, int unit) irqbase = RX62N_TMR_IRQ + TMR_NR_IRQ * unit; for (i = 0; i < TMR_NR_IRQ; i++) { - sysbus_connect_irq(tmr, i, s->irq[irqbase + i]); + sysbus_connect_irq(tmr, i, + qdev_get_gpio_in(DEVICE(&s->icu), irqbase + i)); } sysbus_mmio_map(tmr, 0, RX62N_TMR_BASE + unit * 0x10); } @@ -190,7 +188,8 @@ static void register_cmt(RX62NState *s, int unit) irqbase = RX62N_CMT_IRQ + CMT_NR_IRQ * unit; for (i = 0; i < CMT_NR_IRQ; i++) { - sysbus_connect_irq(cmt, i, s->irq[irqbase + i]); + sysbus_connect_irq(cmt, i, + qdev_get_gpio_in(DEVICE(&s->icu), irqbase + i)); } sysbus_mmio_map(cmt, 0, RX62N_CMT_BASE + unit * 0x10); } @@ -209,7 +208,8 @@ static void register_sci(RX62NState *s, int unit) irqbase = RX62N_SCI_IRQ + SCI_NR_IRQ * unit; for (i = 0; i < SCI_NR_IRQ; i++) { - sysbus_connect_irq(sci, i, s->irq[irqbase + i]); + sysbus_connect_irq(sci, i, + qdev_get_gpio_in(DEVICE(&s->icu), irqbase + i)); } sysbus_mmio_map(sci, 0, RX62N_SCI_BASE + unit * 0x08); } diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index bcda583ab3..766fe0e435 100644 --- a/include/hw/rx/rx62n.h +++ b/include/hw/rx/rx62n.h @@ -67,7 +67,6 @@ struct RX62NState { MemoryRegion iomem2; MemoryRegion iomem3; MemoryRegion c_flash; - qemu_irq irq[NR_IRQS]; /* Input Clock (XTAL) frequency */ uint32_t xtal_freq_hz;