ppc/pseries: Add Power11 cpu type

Add sPAPR CPU Core definition for Power11

Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Tested-by: Amit Machhiwal <amachhiw@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Aditya Gupta 2024-07-31 11:20:22 +05:30 committed by Nicholas Piggin
parent c0d964076c
commit 273db89bca
2 changed files with 14 additions and 4 deletions

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@ -14,10 +14,19 @@ virtualization capabilities.
Supported devices Supported devices
================= =================
* Multi processor support for many Power processors generations: POWER7, * Multi processor support for many Power processors generations:
POWER7+, POWER8, POWER8NVL, POWER9, and Power10. Support for POWER5+ exists, - POWER7, POWER7+
but its state is unknown. - POWER8, POWER8NVL
* Interrupt Controller, XICS (POWER8) and XIVE (POWER9 and Power10) - POWER9
- Power10
- Power11
- Support for POWER5+ also exists, works with correct kernel/userspace
* Interrupt Controller
- XICS (POWER8)
- XIVE (Supported by below:)
- POWER9
- Power10
- Power11
* vPHB PCIe Host bridge. * vPHB PCIe Host bridge.
* vscsi and vnet devices, compatible with the same devices available on a * vscsi and vnet devices, compatible with the same devices available on a
PowerVM hypervisor with VIOS managing LPARs. PowerVM hypervisor with VIOS managing LPARs.

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@ -405,6 +405,7 @@ static const TypeInfo spapr_cpu_core_type_infos[] = {
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.2"), DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.2"),
DEFINE_SPAPR_CPU_CORE_TYPE("power10_v2.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power10_v2.0"),
DEFINE_SPAPR_CPU_CORE_TYPE("power11_v2.0"),
#ifdef CONFIG_KVM #ifdef CONFIG_KVM
DEFINE_SPAPR_CPU_CORE_TYPE("host"), DEFINE_SPAPR_CPU_CORE_TYPE("host"),
#endif #endif