From 98e8779770c40901ed585745aacc9a8e2b934a28 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= Date: Wed, 18 Nov 2020 17:04:14 +0200 Subject: [PATCH 01/24] target/arm: fix stage 2 page-walks in 32-bit emulation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Using a target unsigned long would limit the Input Address to a LPAE page-walk to 32 bits on AArch32 and 64 bits on AArch64. This is okay for stage 1 or on AArch64, but it is insufficient for stage 2 on AArch32. In that later case, the Input Address can have up to 40 bits. Signed-off-by: Rémi Denis-Courmont Reviewed-by: Richard Henderson Message-id: 20201118150414.18360-1-remi@remlab.net Signed-off-by: Peter Maydell --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 11b0803df7..38cd35c049 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -40,7 +40,7 @@ #ifndef CONFIG_USER_ONLY -static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, +static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, bool s1_is_el0, hwaddr *phys_ptr, MemTxAttrs *txattrs, int *prot, @@ -10988,7 +10988,7 @@ static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va, * @fi: set to fault info if the translation fails * @cacheattrs: (if non-NULL) set to the cacheability/shareability attributes */ -static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, +static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, bool s1_is_el0, hwaddr *phys_ptr, MemTxAttrs *txattrs, int *prot, From 98554b3b56b3e74e271385afb00855d48ab1fe16 Mon Sep 17 00:00:00 2001 From: AlexChen Date: Mon, 2 Nov 2020 17:55:23 +0800 Subject: [PATCH 02/24] hw/arm: Fix bad print format specifiers We should use printf format specifier "%u" instead of "%i" for argument of type "unsigned int". Reported-by: Euler Robot Signed-off-by: Alex Chen Message-id: 5F9FD78B.8000300@huawei.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/pxa2xx.c | 2 +- hw/arm/spitz.c | 2 +- hw/arm/tosa.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 591776ba88..1a98f3bd5c 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -675,7 +675,7 @@ static void pxa2xx_ssp_write(void *opaque, hwaddr addr, if (value & SSCR0_MOD) printf("%s: Attempt to use network mode\n", __func__); if (s->enable && SSCR0_DSS(value) < 4) - printf("%s: Wrong data size: %i bits\n", __func__, + printf("%s: Wrong data size: %u bits\n", __func__, SSCR0_DSS(value)); if (!(value & SSCR0_SSE)) { s->sssr = 0; diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 32bdeacfd3..772662f149 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -586,7 +586,7 @@ struct SpitzLCDTG { static void spitz_bl_update(SpitzLCDTG *s) { if (s->bl_power && s->bl_intensity) - zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity); + zaurus_printf("LCD Backlight now at %u/63\n", s->bl_intensity); else zaurus_printf("LCD Backlight now off\n"); } diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index fe88ed89fe..66b244aeff 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -150,7 +150,7 @@ static void tosa_gpio_setup(PXA2xxState *cpu, static uint32_t tosa_ssp_tansfer(SSISlave *dev, uint32_t value) { - fprintf(stderr, "TG: %d %02x\n", value >> 5, value & 0x1f); + fprintf(stderr, "TG: %u %02x\n", value >> 5, value & 0x1f); return 0; } From 57bdec5c46b99f0aa4163eb30939c56c410676c8 Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Wed, 11 Nov 2020 22:17:33 +0800 Subject: [PATCH 03/24] hw/intc: fix heap-buffer-overflow in rxicu_realize() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When 'j = icu->nr_sense – 1', the 'j < icu->nr_sense' condition is true, then 'j = icu->nr_sense', the'icu->init_sense[j]' has out-of-bounds access. The asan showed stack: ERROR: AddressSanitizer: heap-buffer-overflow on address 0x604000004d7d at pc 0x55852cd26a76 bp 0x7ffe39f26200 sp 0x7ffe39f261f0 READ of size 1 at 0x604000004d7d thread T0 #0 0x55852cd26a75 in rxicu_realize ../hw/intc/rx_icu.c:311 #1 0x55852cf075f7 in device_set_realized ../hw/core/qdev.c:886 #2 0x55852cd4a32f in property_set_bool ../qom/object.c:2251 #3 0x55852cd4f9bb in object_property_set ../qom/object.c:1398 #4 0x55852cd54f3f in object_property_set_qobject ../qom/qom-qobject.c:28 #5 0x55852cd4fc3f in object_property_set_bool ../qom/object.c:1465 #6 0x55852cbf0b27 in register_icu ../hw/rx/rx62n.c:156 #7 0x55852cbf12a6 in rx62n_realize ../hw/rx/rx62n.c:261 #8 0x55852cf075f7 in device_set_realized ../hw/core/qdev.c:886 #9 0x55852cd4a32f in property_set_bool ../qom/object.c:2251 #10 0x55852cd4f9bb in object_property_set ../qom/object.c:1398 #11 0x55852cd54f3f in object_property_set_qobject ../qom/qom-qobject.c:28 #12 0x55852cd4fc3f in object_property_set_bool ../qom/object.c:1465 #13 0x55852cbf1a85 in rx_gdbsim_init ../hw/rx/rx-gdbsim.c:109 #14 0x55852cd22de0 in qemu_init ../softmmu/vl.c:4380 #15 0x55852ca57088 in main ../softmmu/main.c:49 #16 0x7feefafa5d42 in __libc_start_main (/lib64/libc.so.6+0x26d42) Add the 'ice->src[i].sense' initialize to the default value, and then process init_sense array to identify which irqs should be level-triggered. Suggested-by: Peter Maydell Reported-by: Euler Robot Signed-off-by: Chen Qun Reviewed-by: Peter Maydell Message-id: 20201111141733.2358800-1-kuhn.chenqun@huawei.com Signed-off-by: Peter Maydell --- hw/intc/rx_icu.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/hw/intc/rx_icu.c b/hw/intc/rx_icu.c index 94e17a9dea..e5c01807b9 100644 --- a/hw/intc/rx_icu.c +++ b/hw/intc/rx_icu.c @@ -300,22 +300,20 @@ static const MemoryRegionOps icu_ops = { static void rxicu_realize(DeviceState *dev, Error **errp) { RXICUState *icu = RX_ICU(dev); - int i, j; + int i; if (icu->init_sense == NULL) { qemu_log_mask(LOG_GUEST_ERROR, "rx_icu: trigger-level property must be set."); return; } - for (i = j = 0; i < NR_IRQS; i++) { - if (icu->init_sense[j] == i) { - icu->src[i].sense = TRG_LEVEL; - if (j < icu->nr_sense) { - j++; - } - } else { - icu->src[i].sense = TRG_PEDGE; - } + + for (i = 0; i < NR_IRQS; i++) { + icu->src[i].sense = TRG_PEDGE; + } + for (i = 0; i < icu->nr_sense; i++) { + uint8_t irqno = icu->init_sense[i]; + icu->src[irqno].sense = TRG_LEVEL; } icu->req_irq = -1; } From 6e84a914770e77b33a10110bdf607cca9e08e134 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:40 +0100 Subject: [PATCH 04/24] MAINTAINERS: Cover system/arm/cpu-features.rst with ARM TCG CPUs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120154545.2504625-2-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2e018a0c1d..a9c74f9aab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -158,6 +158,7 @@ F: disas/arm.c F: disas/arm-a64.cc F: disas/libvixl/ F: docs/system/target-arm.rst +F: docs/system/arm/cpu-features.rst ARM SMMU M: Eric Auger From de8ee7d47cd585d504cb32498e92e223fd187adf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:41 +0100 Subject: [PATCH 05/24] MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Message-id: 20201120154545.2504625-3-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a9c74f9aab..02f8b6f696 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1000,6 +1000,7 @@ F: include/hw/*/*aspeed* F: include/hw/misc/pca9552*.h F: hw/net/ftgmac100.c F: include/hw/net/ftgmac100.h +F: docs/system/arm/aspeed.rst NRF51 M: Joel Stanley From 7170311674df13cbb6bffaba701af60b7ac0836a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:42 +0100 Subject: [PATCH 06/24] MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120154545.2504625-4-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 02f8b6f696..5e478f9a26 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -763,6 +763,7 @@ F: include/hw/*/npcm7xx* F: tests/qtest/npcm7xx* F: pc-bios/npcm7xx_bootrom.bin F: roms/vbootrom +F: docs/system/arm/nuvoton.rst nSeries M: Andrzej Zaborowski From c67d732c39bb201d5dc97716df48311971ab2b26 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:43 +0100 Subject: [PATCH 07/24] MAINTAINERS: Fix system/arm/orangepi.rst path MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes: 0553ef42571 ("docs: add Orange Pi PC document") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Niek Linnenbank Message-id: 20201120154545.2504625-5-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 5e478f9a26..e653ff70d9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -559,7 +559,7 @@ S: Maintained F: hw/*/allwinner-h3* F: include/hw/*/allwinner-h3* F: hw/arm/orangepi.c -F: docs/system/orangepi.rst +F: docs/system/arm/orangepi.rst ARM PrimeCell and CMSDK devices M: Peter Maydell From 9eeeb80ad47e056e1eb688785cc866ec38585cab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:44 +0100 Subject: [PATCH 08/24] MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120154545.2504625-6-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index e653ff70d9..33e44b023a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -857,6 +857,7 @@ R: Leif Lindholm L: qemu-arm@nongnu.org S: Maintained F: hw/arm/sbsa-ref.c +F: docs/system/arm/sbsa.rst Sharp SL-5500 (Collie) PDA M: Peter Maydell From 66278f8aeba0026b483393131f391cc2e746aa80 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 16:45:45 +0100 Subject: [PATCH 09/24] MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120154545.2504625-7-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 33e44b023a..6f4639f00d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1607,6 +1607,7 @@ L: qemu-arm@nongnu.org S: Maintained F: hw/*/omap* F: include/hw/arm/omap.h +F: docs/system/arm/sx1.rst IPack M: Alberto Garcia From 155e1c82ed0da265dbc6cd499a2b2552a5388a9c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 18:39:50 +0100 Subject: [PATCH 10/24] docs/system: Deprecate raspi2/raspi3 machine aliases MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit aa35ec2213b ("hw/arm/raspi: Use more specific machine names") the raspi2/raspi3 machines have been renamed as raspi2b/raspi3b. Note, rather than the raspi3b, the raspi3ap introduced in commit 5be94252d34 ("hw/arm/raspi: Add the Raspberry Pi 3 model A+") is a closer match to what QEMU models, but only provides 512 MB of RAM. As more Raspberry Pi 2/3 models are emulated, in order to avoid confusion, deprecate the raspi2/raspi3 machine aliases. ACKed-by: Peter Krempa Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120173953.2539469-2-f4bug@amsat.org Signed-off-by: Peter Maydell --- docs/system/deprecated.rst | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/docs/system/deprecated.rst b/docs/system/deprecated.rst index d98464098f..565389697e 100644 --- a/docs/system/deprecated.rst +++ b/docs/system/deprecated.rst @@ -346,6 +346,13 @@ This machine has been renamed ``fuloong2e``. These machine types are very old and likely can not be used for live migration from old QEMU versions anymore. A newer machine type should be used instead. +Raspberry Pi ``raspi2`` and ``raspi3`` machines (since 5.2) +''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' + +The Raspberry Pi machines come in various models (A, A+, B, B+). To be able +to distinguish which model QEMU is implementing, the ``raspi2`` and ``raspi3`` +machines have been renamed ``raspi2b`` and ``raspi3b``. + Device options -------------- From d9f2ac3de90d2b4bc7bfef12d69a6bfd0a4df04c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 18:39:51 +0100 Subject: [PATCH 11/24] docs/system/arm: Document the various raspi boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document the following Raspberry Pi models: - raspi0 Raspberry Pi Zero (revision 1.2) - raspi1ap Raspberry Pi A+ (revision 1.1) - raspi2b Raspberry Pi 2B (revision 1.1) - raspi3ap Raspberry Pi 3A+ (revision 1.0) - raspi3b Raspberry Pi 3B (revision 1.2) Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120173953.2539469-3-f4bug@amsat.org Signed-off-by: Peter Maydell --- MAINTAINERS | 1 + docs/system/arm/raspi.rst | 43 ++++++++++++++++++++++++++++++++++++++ docs/system/target-arm.rst | 1 + 3 files changed, 45 insertions(+) create mode 100644 docs/system/arm/raspi.rst diff --git a/MAINTAINERS b/MAINTAINERS index 6f4639f00d..fbb068196a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -803,6 +803,7 @@ F: hw/arm/raspi_platform.h F: hw/*/bcm283* F: include/hw/arm/raspi* F: include/hw/*/bcm283* +F: docs/system/arm/raspi.rst Real View M: Peter Maydell diff --git a/docs/system/arm/raspi.rst b/docs/system/arm/raspi.rst new file mode 100644 index 0000000000..922fe375a6 --- /dev/null +++ b/docs/system/arm/raspi.rst @@ -0,0 +1,43 @@ +Raspberry Pi boards (``raspi0``, ``raspi1ap``, ``raspi2b``, ``raspi3ap``, ``raspi3b``) +====================================================================================== + + +QEMU provides models of the following Raspberry Pi boards: + +``raspi0`` and ``raspi1ap`` + ARM1176JZF-S core, 512 MiB of RAM +``raspi2b`` + Cortex-A7 (4 cores), 1 GiB of RAM +``raspi3ap`` + Cortex-A53 (4 cores), 512 MiB of RAM +``raspi3b`` + Cortex-A53 (4 cores), 1 GiB of RAM + + +Implemented devices +------------------- + + * ARM1176JZF-S, Cortex-A7 or Cortex-A53 CPU + * Interrupt controller + * DMA controller + * Clock and reset controller (CPRMAN) + * System Timer + * GPIO controller + * Serial ports (BCM2835 AUX - 16550 based - and PL011) + * Random Number Generator (RNG) + * Frame Buffer + * USB host (USBH) + * GPIO controller + * SD/MMC host controller + * SoC thermal sensor + * USB2 host controller (DWC2 and MPHI) + * MailBox controller (MBOX) + * VideoCore firmware (property) + + +Missing devices +--------------- + + * Peripheral SPI controller (SPI) + * Analog to Digital Converter (ADC) + * Pulse Width Modulation (PWM) diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index a0d5c57799..bde4b8e044 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -90,6 +90,7 @@ undocumented; you can get a complete list by running arm/nuvoton arm/orangepi arm/palm + arm/raspi arm/xscale arm/collie arm/sx1 From 12bff81b4dfa01fe7956d25f2687df46caff7041 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 18:39:52 +0100 Subject: [PATCH 12/24] docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document the 3 front LEDs modeled on the OpenPOWER Witherspoon BMC (see commit 7cfbde5ea1c "hw/arm/aspeed: Add the 3 front LEDs drived by the PCA9552 #1"). Reviewed-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120173953.2539469-4-f4bug@amsat.org Signed-off-by: Peter Maydell --- docs/system/arm/aspeed.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index b7a176659c..690bada784 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -47,6 +47,7 @@ Supported devices * GPIO Controller (Master only) * UART * Ethernet controllers + * Front LEDs (PCA9552 on I2C bus) Missing devices From 75bf6e17f953feedcd260f5d6a993fbb569c9915 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Nov 2020 18:39:53 +0100 Subject: [PATCH 13/24] docs/system/arm: Document the Sharp Zaurus SL-6000 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit List the 'tosa' machine with the XScale-based PDAs models. Signed-off-by: Philippe Mathieu-Daudé Message-id: 20201120173953.2539469-5-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- docs/system/arm/xscale.rst | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/docs/system/arm/xscale.rst b/docs/system/arm/xscale.rst index 89ec93e904..d2d5949e10 100644 --- a/docs/system/arm/xscale.rst +++ b/docs/system/arm/xscale.rst @@ -1,16 +1,22 @@ -Sharp XScale-based PDA models (``akita``, ``borzoi``, ``spitz``, ``terrier``) -============================================================================= +Sharp XScale-based PDA models (``akita``, ``borzoi``, ``spitz``, ``terrier``, ``tosa``) +======================================================================================= -The XScale-based clamshell PDA models (\"Spitz\", \"Akita\", \"Borzoi\" -and \"Terrier\") emulation includes the following peripherals: +The Sharp Zaurus are PDAs based on XScale, able to run Linux ('SL series'). -- Intel PXA270 System-on-chip (ARMv5TE core) +The SL-6000 (\"Tosa\"), released in 2005, uses a PXA255 System-on-chip. -- NAND Flash memory +The SL-C3000 (\"Spitz\"), SL-C1000 (\"Akita\"), SL-C3100 (\"Borzoi\") and +SL-C3200 (\"Terrier\") use a PXA270. + +The clamshell PDA models emulation includes the following peripherals: + +- Intel PXA255/PXA270 System-on-chip (ARMv5TE core) + +- NAND Flash memory - not in \"Tosa\" - IBM/Hitachi DSCM microdrive in a PXA PCMCIA slot - not in \"Akita\" -- On-chip OHCI USB controller +- On-chip OHCI USB controller - not in \"Tosa\" - On-chip LCD controller From 6951595183e5481931f03284d5cc6a481fe7c713 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 19 Nov 2020 09:23:46 +0000 Subject: [PATCH 14/24] target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The semihosting SYS_HEAPINFO call is supposed to return an array of four guest addresses: * base of heap memory * limit of heap memory * base of stack memory * limit of stack memory Some semihosting programs (including those compiled to use the 'newlib' embedded C library) use this call to work out where they should initialize themselves to. QEMU's implementation when in system emulation mode is very simplistic: we say that the heap starts halfway into RAM and continues to the end of RAM, and the stack starts at the top of RAM and works down to the bottom. Unfortunately the code assumes that the base address of RAM is at address 0, so on boards like 'virt' where this is not true the addresses returned will all be wrong and the guest application will usually crash. Conveniently since all Arm boards call arm_load_kernel() we have the base address of the main RAM block in the arm_boot_info struct which is accessible via the CPU object. Use this to return sensible values from SYS_HEAPINFO. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée Message-id: 20201119092346.32356-1-peter.maydell@linaro.org --- target/arm/arm-semi.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c index c1df664f7e..c892e0e674 100644 --- a/target/arm/arm-semi.c +++ b/target/arm/arm-semi.c @@ -36,6 +36,7 @@ #else #include "exec/gdbstub.h" #include "qemu/cutils.h" +#include "hw/arm/boot.h" #endif #define TARGET_SYS_OPEN 0x01 @@ -1014,6 +1015,9 @@ target_ulong do_arm_semihosting(CPUARMState *env) int i; #ifdef CONFIG_USER_ONLY TaskState *ts = cs->opaque; +#else + const struct arm_boot_info *info = env->boot_info; + target_ulong rambase = info->loader_start; #endif GET_ARG(0); @@ -1046,10 +1050,10 @@ target_ulong do_arm_semihosting(CPUARMState *env) #else limit = ram_size; /* TODO: Make this use the limit of the loaded application. */ - retvals[0] = limit / 2; - retvals[1] = limit; - retvals[2] = limit; /* Stack base */ - retvals[3] = 0; /* Stack limit. */ + retvals[0] = rambase + limit / 2; + retvals[1] = rambase + limit; + retvals[2] = rambase + limit; /* Stack base */ + retvals[3] = rambase; /* Stack limit. */ #endif for (i = 0; i < ARRAY_SIZE(retvals); i++) { From acebed948c4f2f3be89ba91f4cba1905a8b66318 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 17 Nov 2020 15:56:34 +0000 Subject: [PATCH 15/24] linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints The Linux kernel doesn't use the official bkpt insn for breakpoints; instead it uses three instructions in the guaranteed-to-UNDEF space, and generates SIGTRAP for these rather than the SIGILL that most UNDEF insns generate: https://elixir.bootlin.com/linux/v5.9.8/source/arch/arm/kernel/ptrace.c#L197 Make QEMU treat these insns specially too. The main benefit of this is that if you're running a debugger on a guest program that runs into a GCC __builtin_trap() or LLVM "trap because execution should never reach here" then you'll get the expected signal rather than a SIGILL. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20201117155634.6924-1-peter.maydell@linaro.org --- linux-user/arm/cpu_loop.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 13629ee1f6..3d272b56ef 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -205,6 +205,24 @@ do_kernel_trap(CPUARMState *env) return 0; } +static bool insn_is_linux_bkpt(uint32_t opcode, bool is_thumb) +{ + /* + * Return true if this insn is one of the three magic UDF insns + * which the kernel treats as breakpoint insns. + */ + if (!is_thumb) { + return (opcode & 0x0fffffff) == 0x07f001f0; + } else { + /* + * Note that we get the two halves of the 32-bit T32 insn + * in the opposite order to the value the kernel uses in + * its undef_hook struct. + */ + return ((opcode & 0xffff) == 0xde01) || (opcode == 0xa000f7f0); + } +} + void cpu_loop(CPUARMState *env) { CPUState *cs = env_cpu(env); @@ -234,6 +252,16 @@ void cpu_loop(CPUARMState *env) /* FIXME - what to do if get_user() fails? */ get_user_code_u32(opcode, env->regs[15], env); + /* + * The Linux kernel treats some UDF patterns specially + * to use as breakpoints (instead of the architectural + * bkpt insn). These should trigger a SIGTRAP rather + * than SIGILL. + */ + if (insn_is_linux_bkpt(opcode, env->thumb)) { + goto excp_debug; + } + rc = EmulateAll(opcode, &ts->fpa, env); if (rc == 0) { /* illegal instruction */ info.si_signo = TARGET_SIGILL; From 4faf359accb274d37ddb0e7b68617b9297b9120e Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:33 +0000 Subject: [PATCH 16/24] docs: Move virtio-net-failover.rst into the system manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The virtio-net-failover documentation is currently orphan and not included in any manual; move it into the system manual, immediately following the general network emulation section. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/system/index.rst | 1 + docs/{ => system}/virtio-net-failover.rst | 0 2 files changed, 1 insertion(+) rename docs/{ => system}/virtio-net-failover.rst (100%) diff --git a/docs/system/index.rst b/docs/system/index.rst index c0f685b818..d0613cd5f7 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -21,6 +21,7 @@ Contents: monitor images net + virtio-net-failover usb ivshmem linuxboot diff --git a/docs/virtio-net-failover.rst b/docs/system/virtio-net-failover.rst similarity index 100% rename from docs/virtio-net-failover.rst rename to docs/system/virtio-net-failover.rst From 392d8e95c7dd3de10a20387914ac34cb12d8ff04 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:34 +0000 Subject: [PATCH 17/24] docs: Move cpu-hotplug.rst into the system manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The cpu-hotplug.rst documentation is currently orphan and not included in any manual; move it into the system manual. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/{ => system}/cpu-hotplug.rst | 0 docs/system/index.rst | 1 + 2 files changed, 1 insertion(+) rename docs/{ => system}/cpu-hotplug.rst (100%) diff --git a/docs/cpu-hotplug.rst b/docs/system/cpu-hotplug.rst similarity index 100% rename from docs/cpu-hotplug.rst rename to docs/system/cpu-hotplug.rst diff --git a/docs/system/index.rst b/docs/system/index.rst index d0613cd5f7..0f0f6d2e99 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -29,6 +29,7 @@ Contents: tls gdb managed-startup + cpu-hotplug targets security deprecated From 71266bb4e9468662d88739827c78fcb37285c643 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:35 +0000 Subject: [PATCH 18/24] docs: Move virtio-pmem.rst into the system manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/system/index.rst | 1 + docs/{ => system}/virtio-pmem.rst | 0 2 files changed, 1 insertion(+) rename docs/{ => system}/virtio-pmem.rst (100%) diff --git a/docs/system/index.rst b/docs/system/index.rst index 0f0f6d2e99..2a5155c67d 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -30,6 +30,7 @@ Contents: gdb managed-startup cpu-hotplug + virtio-pmem targets security deprecated diff --git a/docs/virtio-pmem.rst b/docs/system/virtio-pmem.rst similarity index 100% rename from docs/virtio-pmem.rst rename to docs/system/virtio-pmem.rst From c5d7cfdaace7f547fd572b50baaa7182366513e7 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:36 +0000 Subject: [PATCH 19/24] docs/system/virtio-pmem.rst: Fix minor style issues MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The virtio-pmem documentation has some minor style issues we hadn't noticed since we weren't rendering it in our docs: * Sphinx doesn't complain about overlong title-underlining the way it complains about too-short underlining, but it looks odd; make the underlines of section headers the right length * Indent of paragraphs makes them render as blockquotes; remove the indent so they just render as normal text * Leading 'o' isn't rst markup, so it just renders as a literal "o"; reformat as a subsection heading instead * "QEMU" in the document title and section headings are a bit odd and unnecessary since this is the QEMU manual; delete or rephrase them * There's no need to specify what QEMU version the device first appeared in. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée Reviewed-by: Pankaj Gupta --- docs/system/virtio-pmem.rst | 60 ++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/docs/system/virtio-pmem.rst b/docs/system/virtio-pmem.rst index 4bf5d00443..c82ac06731 100644 --- a/docs/system/virtio-pmem.rst +++ b/docs/system/virtio-pmem.rst @@ -1,38 +1,37 @@ -======================== -QEMU virtio pmem -======================== +=========== +virtio pmem +=========== - This document explains the setup and usage of the virtio pmem device - which is available since QEMU v4.1.0. - - The virtio pmem device is a paravirtualized persistent memory device - on regular (i.e non-NVDIMM) storage. +This document explains the setup and usage of the virtio pmem device. +The virtio pmem device is a paravirtualized persistent memory device +on regular (i.e non-NVDIMM) storage. Usecase --------- +------- - Virtio pmem allows to bypass the guest page cache and directly use - host page cache. This reduces guest memory footprint as the host can - make efficient memory reclaim decisions under memory pressure. +Virtio pmem allows to bypass the guest page cache and directly use +host page cache. This reduces guest memory footprint as the host can +make efficient memory reclaim decisions under memory pressure. -o How does virtio-pmem compare to the nvdimm emulation supported by QEMU? +How does virtio-pmem compare to the nvdimm emulation? +----------------------------------------------------- - NVDIMM emulation on regular (i.e. non-NVDIMM) host storage does not - persist the guest writes as there are no defined semantics in the device - specification. The virtio pmem device provides guest write persistence - on non-NVDIMM host storage. +NVDIMM emulation on regular (i.e. non-NVDIMM) host storage does not +persist the guest writes as there are no defined semantics in the device +specification. The virtio pmem device provides guest write persistence +on non-NVDIMM host storage. virtio pmem usage ----------------- - A virtio pmem device backed by a memory-backend-file can be created on - the QEMU command line as in the following example:: +A virtio pmem device backed by a memory-backend-file can be created on +the QEMU command line as in the following example:: -object memory-backend-file,id=mem1,share,mem-path=./virtio_pmem.img,size=4G -device virtio-pmem-pci,memdev=mem1,id=nv1 - where: +where: - "object memory-backend-file,id=mem1,share,mem-path=, size=" creates a backend file with the specified size. @@ -40,8 +39,8 @@ virtio pmem usage - "device virtio-pmem-pci,id=nvdimm1,memdev=mem1" creates a virtio pmem pci device whose storage is provided by above memory backend device. - Multiple virtio pmem devices can be created if multiple pairs of "-object" - and "-device" are provided. +Multiple virtio pmem devices can be created if multiple pairs of "-object" +and "-device" are provided. Hotplug ------- @@ -59,17 +58,18 @@ the guest:: Guest Data Persistence ---------------------- - Guest data persistence on non-NVDIMM requires guest userspace applications - to perform fsync/msync. This is different from a real nvdimm backend where - no additional fsync/msync is required. This is to persist guest writes in - host backing file which otherwise remains in host page cache and there is - risk of losing the data in case of power failure. +Guest data persistence on non-NVDIMM requires guest userspace applications +to perform fsync/msync. This is different from a real nvdimm backend where +no additional fsync/msync is required. This is to persist guest writes in +host backing file which otherwise remains in host page cache and there is +risk of losing the data in case of power failure. - With virtio pmem device, MAP_SYNC mmap flag is not supported. This provides - a hint to application to perform fsync for write persistence. +With virtio pmem device, MAP_SYNC mmap flag is not supported. This provides +a hint to application to perform fsync for write persistence. Limitations ------------- +----------- + - Real nvdimm device backend is not supported. - virtio pmem hotunplug is not supported. - ACPI NVDIMM features like regions/namespaces are not supported. From 7f0cff6e3427d82f81243660d0035d647ee5ee05 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:37 +0000 Subject: [PATCH 20/24] docs: Split out 'pc' machine model docs into their own file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently target-i386.rst includes the documentation of the 'pc' machine model inline. Split it out into its own file, in a similar way to target-i386.rst; this gives us a place to put documentation of other i386 machine models, such as 'microvm'. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/system/i386/pc.rst | 7 +++++++ docs/system/target-i386.rst | 18 +++++++++++++----- 2 files changed, 20 insertions(+), 5 deletions(-) create mode 100644 docs/system/i386/pc.rst diff --git a/docs/system/i386/pc.rst b/docs/system/i386/pc.rst new file mode 100644 index 0000000000..d543c11a5c --- /dev/null +++ b/docs/system/i386/pc.rst @@ -0,0 +1,7 @@ +i440fx PC (``pc-i440fx``, ``pc``) +================================= + +Peripherals +~~~~~~~~~~~ + +.. include:: ../target-i386-desc.rst.inc diff --git a/docs/system/target-i386.rst b/docs/system/target-i386.rst index 51be03d881..1612ddba90 100644 --- a/docs/system/target-i386.rst +++ b/docs/system/target-i386.rst @@ -1,14 +1,22 @@ .. _QEMU-PC-System-emulator: -x86 (PC) System emulator ------------------------- +x86 System emulator +------------------- .. _pcsys_005fdevices: -Peripherals -~~~~~~~~~~~ +Board-specific documentation +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. include:: target-i386-desc.rst.inc +.. + This table of contents should be kept sorted alphabetically + by the title text of each file, which isn't the same ordering + as an alphabetical sort by filename. + +.. toctree:: + :maxdepth: 1 + + i386/pc .. include:: cpu-models-x86.rst.inc From e8eee8d3d90690b73caac6b0059ad02ed1f170e6 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:38 +0000 Subject: [PATCH 21/24] docs: Move microvm.rst into the system manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that target-i386.rst has a place to list documentation of machines other than the 'pc' machine, we have a place we can move the microvm documentation to. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/{ => system/i386}/microvm.rst | 5 ++--- docs/system/target-i386.rst | 1 + 2 files changed, 3 insertions(+), 3 deletions(-) rename docs/{ => system/i386}/microvm.rst (98%) diff --git a/docs/microvm.rst b/docs/system/i386/microvm.rst similarity index 98% rename from docs/microvm.rst rename to docs/system/i386/microvm.rst index fcf41fc1f6..1675e37d3e 100644 --- a/docs/microvm.rst +++ b/docs/system/i386/microvm.rst @@ -1,6 +1,5 @@ -==================== -microvm Machine Type -==================== +'microvm' virtual platform (``microvm``) +======================================== ``microvm`` is a machine type inspired by ``Firecracker`` and constructed after its machine model. diff --git a/docs/system/target-i386.rst b/docs/system/target-i386.rst index 1612ddba90..22ba5ce2c0 100644 --- a/docs/system/target-i386.rst +++ b/docs/system/target-i386.rst @@ -16,6 +16,7 @@ Board-specific documentation .. toctree:: :maxdepth: 1 + i386/microvm i386/pc .. include:: cpu-models-x86.rst.inc From 0daf34fd3a18aa2a43217c320e2a39d69e52d3f4 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:39 +0000 Subject: [PATCH 22/24] docs: Move pr-manager.rst into the system manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the pr-manager documentation into the system manual. Some of it (the documentation of the pr-manager-helper tool) should be in tools, but we will split it up after moving it. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/system/index.rst | 1 + docs/{ => system}/pr-manager.rst | 0 2 files changed, 1 insertion(+) rename docs/{ => system}/pr-manager.rst (100%) diff --git a/docs/system/index.rst b/docs/system/index.rst index 2a5155c67d..e5a35817a2 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -31,6 +31,7 @@ Contents: managed-startup cpu-hotplug virtio-pmem + pr-manager targets security deprecated diff --git a/docs/pr-manager.rst b/docs/system/pr-manager.rst similarity index 100% rename from docs/pr-manager.rst rename to docs/system/pr-manager.rst From 773ee3f1ea50eb996cced930cc29b1b27bfbc6fa Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:40 +0000 Subject: [PATCH 23/24] docs: Split qemu-pr-helper documentation into tools manual MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Split the documentation of the qemu-pr-helper binary into the tools manual, and give it a manpage like our other standalone executables. Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/meson.build | 1 + docs/system/pr-manager.rst | 38 ++------------- docs/tools/conf.py | 2 + docs/tools/index.rst | 1 + docs/tools/qemu-pr-helper.rst | 90 +++++++++++++++++++++++++++++++++++ 5 files changed, 99 insertions(+), 33 deletions(-) create mode 100644 docs/tools/qemu-pr-helper.rst diff --git a/docs/meson.build b/docs/meson.build index bf8204a08f..ebd85d59f9 100644 --- a/docs/meson.build +++ b/docs/meson.build @@ -60,6 +60,7 @@ if build_docs 'tools': { 'qemu-img.1': (have_tools ? 'man1' : ''), 'qemu-nbd.8': (have_tools ? 'man8' : ''), + 'qemu-pr-helper.8': (have_tools ? 'man8' : ''), 'qemu-trace-stap.1': (config_host.has_key('CONFIG_TRACE_SYSTEMTAP') ? 'man1' : ''), 'virtfs-proxy-helper.1': (have_virtfs_proxy_helper ? 'man1' : ''), 'virtiofsd.1': (have_virtiofsd ? 'man1' : ''), diff --git a/docs/system/pr-manager.rst b/docs/system/pr-manager.rst index 9b1de198b1..3f5b9f94dc 100644 --- a/docs/system/pr-manager.rst +++ b/docs/system/pr-manager.rst @@ -50,39 +50,11 @@ Alternatively, using ``-blockdev``:: -blockdev node-name=hd,driver=raw,file.driver=host_device,file.filename=/dev/sdb,file.pr-manager=helper0 -device scsi-block,drive=hd ----------------------------------- -Invoking :program:`qemu-pr-helper` ----------------------------------- - -QEMU provides an implementation of the persistent reservation helper, -called :program:`qemu-pr-helper`. The helper should be started as a -system service and supports the following option: - --d, --daemon run in the background --q, --quiet decrease verbosity --v, --verbose increase verbosity --f, --pidfile=path PID file when running as a daemon --k, --socket=path path to the socket --T, --trace=trace-opts tracing options - -By default, the socket and PID file are placed in the runtime state -directory, for example :file:`/var/run/qemu-pr-helper.sock` and -:file:`/var/run/qemu-pr-helper.pid`. The PID file is not created -unless :option:`-d` is passed too. - -:program:`qemu-pr-helper` can also use the systemd socket activation -protocol. In this case, the systemd socket unit should specify a -Unix stream socket, like this:: - - [Socket] - ListenStream=/var/run/qemu-pr-helper.sock - -After connecting to the socket, :program:`qemu-pr-helper`` can optionally drop -root privileges, except for those capabilities that are needed for -its operation. To do this, add the following options: - --u, --user=user user to drop privileges to --g, --group=group group to drop privileges to +You will also need to ensure that the helper program +:command:`qemu-pr-helper` is running, and that it has been +set up to use the same socket filename as your QEMU commandline +specifies. See the qemu-pr-helper documentation or manpage for +further details. --------------------------------------------- Multipath devices and persistent reservations diff --git a/docs/tools/conf.py b/docs/tools/conf.py index 9052d17d6d..4760d36ff2 100644 --- a/docs/tools/conf.py +++ b/docs/tools/conf.py @@ -22,6 +22,8 @@ man_pages = [ ['Fabrice Bellard'], 1), ('qemu-nbd', 'qemu-nbd', u'QEMU Disk Network Block Device Server', ['Anthony Liguori '], 8), + ('qemu-pr-helper', 'qemu-pr-helper', 'QEMU persistent reservation helper', + [], 8), ('qemu-trace-stap', 'qemu-trace-stap', u'QEMU SystemTap trace tool', [], 1), ('virtfs-proxy-helper', 'virtfs-proxy-helper', diff --git a/docs/tools/index.rst b/docs/tools/index.rst index 232ce9f3e4..b99f86c7c6 100644 --- a/docs/tools/index.rst +++ b/docs/tools/index.rst @@ -12,6 +12,7 @@ Contents: qemu-img qemu-nbd + qemu-pr-helper qemu-trace-stap virtfs-proxy-helper virtiofsd diff --git a/docs/tools/qemu-pr-helper.rst b/docs/tools/qemu-pr-helper.rst new file mode 100644 index 0000000000..ac036180ac --- /dev/null +++ b/docs/tools/qemu-pr-helper.rst @@ -0,0 +1,90 @@ +QEMU persistent reservation helper +================================== + +Synopsis +-------- + +**qemu-pr-helper** [*OPTION*] + +Description +----------- + +Implements the persistent reservation helper for QEMU. + +SCSI persistent reservations allow restricting access to block devices +to specific initiators in a shared storage setup. When implementing +clustering of virtual machines, it is a common requirement for virtual +machines to send persistent reservation SCSI commands. However, +the operating system restricts sending these commands to unprivileged +programs because incorrect usage can disrupt regular operation of the +storage fabric. QEMU's SCSI passthrough devices ``scsi-block`` +and ``scsi-generic`` support passing guest persistent reservation +requests to a privileged external helper program. :program:`qemu-pr-helper` +is that external helper; it creates a socket which QEMU can +connect to to communicate with it. + +If you want to run VMs in a setup like this, this helper should be +started as a system service, and you should read the QEMU manual +section on "persistent reservation managers" to find out how to +configure QEMU to connect to the socket created by +:program:`qemu-pr-helper`. + +After connecting to the socket, :program:`qemu-pr-helper` can +optionally drop root privileges, except for those capabilities that +are needed for its operation. + +:program:`qemu-pr-helper` can also use the systemd socket activation +protocol. In this case, the systemd socket unit should specify a +Unix stream socket, like this:: + + [Socket] + ListenStream=/var/run/qemu-pr-helper.sock + +Options +------- + +.. program:: qemu-pr-helper + +.. option:: -d, --daemon + + run in the background (and create a PID file) + +.. option:: -q, --quiet + + decrease verbosity + +.. option:: -v, --verbose + + increase verbosity + +.. option:: -f, --pidfile=PATH + + PID file when running as a daemon. By default the PID file + is created in the system runtime state directory, for example + :file:`/var/run/qemu-pr-helper.pid`. + +.. option:: -k, --socket=PATH + + path to the socket. By default the socket is created in + the system runtime state directory, for example + :file:`/var/run/qemu-pr-helper.sock`. + +.. option:: -T, --trace [[enable=]PATTERN][,events=FILE][,file=FILE] + + .. include:: ../qemu-option-trace.rst.inc + +.. option:: -u, --user=USER + + user to drop privileges to + +.. option:: -g, --group=GROUP + + group to drop privileges to + +.. option:: -h, --help + + Display a help message and exit. + +.. option:: -V, --version + + Display version information and exit. From c6ff78563ad2971f289168c7cae6ecb0b4359516 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Nov 2020 14:40:41 +0000 Subject: [PATCH 24/24] docs/system/pr-manager.rst: Fix minor docs nits MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix a couple of nits in pr-manager.rst: * the title marker for the top level heading is overlength * stray capital 'R' in the middle of a sentence Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- docs/system/pr-manager.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/system/pr-manager.rst b/docs/system/pr-manager.rst index 3f5b9f94dc..b19a0c15e6 100644 --- a/docs/system/pr-manager.rst +++ b/docs/system/pr-manager.rst @@ -1,8 +1,8 @@ -====================================== +=============================== Persistent reservation managers -====================================== +=============================== -SCSI persistent Reservations allow restricting access to block devices +SCSI persistent reservations allow restricting access to block devices to specific initiators in a shared storage setup. When implementing clustering of virtual machines, it is a common requirement for virtual machines to send persistent reservation SCSI commands. However,